Overview

Georgia Institute of Technology is partnering with SRC to create a $2.5 million research center focused on transistor interconnects and chip packaging. The Interconnect and Packaging Center (IPC) will bring academia, industry, and government together to develop faster performing chips that are more energy efficient. The cooperative work of the center's participants is aimed at two objectives: creation of leading-edge technologies that connect billions of transistors on a chip, called interconnects, and improved ability of different chips to communicate with each other through enhanced packaging. Smaller, more powerful chips could be the result.

Research Focus

The center hopes to devise leading-edge interconnects. It also hopes to improve the ability of different chips to communicate via packaging. To facilitate huge computing gains, about half of the IPC research will focus on new 3D technology. 3D can provide the semiconductor industry with viable options for stacking multiple chips vertically at room temperature while maintaining millions of inter-die electrical connections.

Center Management

Overall leadership and management of the IPC is the responsibility of Professor Madhavan Swaminathan.