SRC Program Management

 View SRC Senior Management

Dr. Roman Caudillo

Dr. Roman Caudillo joined SRC as an Intel Assignee to serve as the JUMP 2.0 Director starting January 2023. Previously, and throughout his career at Intel, Roman has enjoyed working with academic and government partners and collaborators. He previously received the Mahboob Kahn award from the SRC for being an outstanding industry liaison for the StarNet program, has been a co-PI for a NSF GOALII grant on graphene spintronic devices, has been an Intel researcher in residence at MIT, and is an alumnus of the National Academy of Engineering Frontiers of Engineering class of 2019 (NAE-FOE). Roman has served as the co-chair of Intel’s Materials and Patterning Strategic Research Segment (SRS), is a Director of an Intel University Research and Collaboration Center on 2D Materials, and previously served as an Intel SAB member for the SRC JUMP program. Roman received his B.S. from Yale University and obtained his PhD in Materials Science at the University of Texas at Austin under the Nobel Laureate John Goodenough. He has worked on EUV research, graphene and 2D materials, spintronics, and in quantum computing fabrication and measurement for both superconducting and Si spin qubit technologies. Roman holds over 30 patents ranging in topics from 2D materials to quantum computing.

Joint University Microelectronics Program 2.0 (JUMP 2.0)

Jacqui Hall

JUMP, Undergraduate Research Initiative (JUMP-URI)
Undergraduate Research Program (URP)
SRC Research Scholars

Jacqueline Hall is the Scholars Programs Manager at SRC overseeing all student program initiatives including undergraduate research and fellowships. Her primary concentration is to support students pursuing higher degrees working on cutting-edge research, provide data analysis, and foster student interactions with member companies for career opportunities.

More recently, she has dedicated herself to building undergraduate programs like JUMP Undergraduate Research Initiative and the Undergraduate Research program that create pipelines to increase retention of students interested in majors relevant to technology and semiconductor industries.

Jacqui received her Bachelor of Arts degree in Sociology and a certification in Marketing and Management from Duke University in 1994.  In her spare time, she loves to dance, practice yoga and make crafts.

Dr. Adam Knapp

Dr. Adam Knapp joined SRC as JUMP Program Manager in September 2022. Previously, he worked at the U. S. Naval Research Laboratory in Washington, DC for nearly 8 years first as a NRC post-doctoral scholar and then as a federal research chemist. His scientific expertise lies in computational and theoretical chemical and condensed matter physics and applied mathematics. He has led teams focused on the integration of machine learning and data analytic techniques into the chemical and autonomous instrument workflow, worked with DARPA on Navy-relevant chemistries for machine learning-driven automated synthesis, and (co)-developed/contributed to methodologies for logistics tracking, figures of merit for chemical detection, quantum chemistry on quantum computers, oceanic bioinformatics surveillance, and underwater autonomous vehicle pathfinding.

Dr. Knapp received his Ph. D. in Chemical Physics from the University of Illinois at Urbana-Champaign. He has acted as a proposal reviewer for DARPA, provided assessments to advisory boards of the National Academy of Sciences and federal agencies, advised the National Science Foundation on data science in chemistry, and reviewed articles for multiple journals in the chemical physics space. He is the (co)-author of numerous government reports and has 5 patent applications pending

Joint University Microelectronics Program 2.0 (JUMP 2.0)

John Oakley

AI Hardware (AIHW)
Hardware Security (HWS)
Packaging (PKG)
Supply Chain AI Realized Future (SCARF)

John Oakley, an innovative Science Director at SRC, spearheads transformative research endeavors in Hardware Security (HWS), Packaging (PKG), AI Hardware (AIHW), and Supply Chain AI Realized Future (SCARF). A catalyst for collaboration, John cultivates strategic alliances across government, industry, and academia to drive progress in these critical domains.

With over two decades of expertise in mixed-signal design and architecture, John honed his craft at renowned institutions such as Intel Corporation, Motorola, Freescale, and Fujitsu. His distinguished career boasts 14 issued patents and the development of over 55 integrated devices, many of which have achieved significant market success. Specializing in digital and mixed signal systems, he currently focuses on advancements in the transceiver and modem realms, with a particular emphasis on cellular platform control planes. John's mastery extends to 3GPP standards, where he served as Vice Chairman of the MIPI RFFE standard working group, contributor to the MIPI RIO and TSG standards, and collaborated with multiple 3GPP RAN working groups.

A proud alum of Texas A&M University, John extends his commitment to cybersecurity through his role as a Board member of the Florida Institute for Cybersecurity Research (FICS). His influence transcends boundaries, shaping the trajectory of digital innovation and security for years to come. A sought-after keynote speaker and panelist at cybersecurity, advanced packaging, and semiconductor design conferences, John's insights drive industry discourse forward.

Beyond his professional endeavors, John is a Ruby Life Master at the American Contract Bridge League (ACBL) and an enthusiastic player of strategy and role-playing games.


Dr. Hsuanyu (Marcus) Pan

Dr. Hsuanyu (Marcus) Pan joined SRC as program manager in 2021. Prior to SRC, he spent over 5 years at Boeing Research & Technology (BR&T) serving as a program manager with a focus on integrated circuits (ICs) research and development. He has successfully led research teams to execute many research programs from US government including Defense Advanced Research Projects Agency (DARPA) and Air Force Research Laboratory (AFRL). Prior to Boeing, he was with HRL laboratories and Qualcomm as a senior design engineer to lead RF, analog and mixed-signal electronics development for commercial, automobile and aerospace wireless communication.

 Dr. Pan received his Ph.D in Electrical Engineering from University of California, San Diego. He also served as Boeing Technology Journal (BTJ) associate editor, IEEE Coastal Los Angeles Section (CLAS) Microwave Theory and Technology Society (MTT-S) Chair from 2016 to 2020. He authored and co-authored over 17 papers and holds 8 patents. He is a certified Project Management Professional (PMP).


Analog/Mixed-Signal Circuits, Systems, and Devices (AMS-CSD)
Computer-Aided Design and Test (CADT)
India Research Program (IRP)

Kashyap Yellai

Logic and Memory Devices (LMD)
Nanomanufacturing Materials and Processes (NMP)
Environment, Safety, and Health (ESH)

Kashyap Yellai joined SRC as a program manager in 2022. Kashyap leads Logic & Memory Devices (LMD), Nanomanufacturing Materials & Processes (NMP) and Environment, Safety & Health (ESH) programs which are part of Global Research Collaboration (GRC). Prior to joining SRC, Kashyap successfully led the start-up and ramp of Intel’s Optane Memory research and development center. Kashyap has lot of experience in research and development and high-volume manufacturing of NAND and Optane memories. Kashyap is very passionate about of technology transfer and scaling to high volume manufacturing.

Kashyap received his MBA from University of Utah, UT and MS in Physics and Materials Science from Auburn University, AL. Outside work Kashyap enjoys swimming and developing chess playing skills.

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