SRC Program Management

Dr. Roman Caudillo joined SRC as an Intel Assignee to serve as the JUMP 2.0 Director starting January 2023. Previously, and throughout his career at Intel, Roman has enjoyed working with academic and government partners and collaborators. He previously received the Mahboob Kahn award from the SRC for being an outstanding industry liaison for the StarNet program, has been a co-PI for a NSF GOALII grant on graphene spintronic devices, has been an Intel researcher in residence at MIT, and is an alumnus of the National Academy of Engineering Frontiers of Engineering class of 2019 (NAE-FOE). Roman has served as the co-chair of Intel’s Materials and Patterning Strategic Research Segment (SRS), is a Director of an Intel University Research and Collaboration Center on 2D Materials, and previously served as an Intel SAB member for the SRC JUMP program. Roman received his B.S. from Yale University and obtained his PhD in Materials Science at the University of Texas at Austin under the Nobel Laureate John Goodenough. He has worked on EUV research, graphene and 2D materials, spintronics, and in quantum computing fabrication and measurement for both superconducting and Si spin qubit technologies. Roman holds over 30 patents ranging in topics from 2D materials to quantum computing.

GRC & JUMP 2.0
Undergraduate Research Program (URP)
SRC Research Scholars

Jacqueline Hall is an accomplished Scholar Programs Manager at the Semiconductor Research Corporation (SRC) with over a decade of experience in workforce development, particularly within the semiconductor industry. With a strong background in managing and enhancing student programs, Jacqueline has been instrumental in creating robust pipelines for student retention in technology-related majors.

 She holds a BA in Sociology with a Business concentration from Duke University, where she also earned certifications in Marketing and Management. Throughout her career at SRC, Jacqueline has successfully overseen various scholar programs, ensuring that SRC-funded students secure employment with member companies. Her innovative approach has led to the development and execution of new concepts for program growth, significantly increasing member engagement in recruiting efforts.

Jacqueline has made notable contributions to the field, including assisting in writing Chapter 11 of the MAPT roadmap focused on Workforce Development and authoring a six-part blog series for the SRC Workforce Advisory Board. Her work has been pivotal in enhancing the visibility and understanding of SRC's workforce development programs and resources.

In her spare time, Jacqueline enjoys reading books, practicing yoga, traveling, and spending time with family and friends.

John Oakley, an innovative Science Director at SRC, spearheads transformative research endeavors in Hardware Security (HWS), Packaging (PKG), AI Hardware (AIHW), and Supply Chain AI Realized Future (SCARF). A catalyst for collaboration, John cultivates strategic alliances across government, industry, and academia to drive progress in these critical domains.

With over two decades of expertise in mixed-signal design and architecture, John honed his craft at renowned institutions such as Intel Corporation, Motorola, Freescale, and Fujitsu. His distinguished career boasts 14 issued patents and the development of over 55 integrated devices, many of which have achieved significant market success. Specializing in digital and mixed signal systems, he currently focuses on advancements in the transceiver and modem realms, with a particular emphasis on cellular platform control planes. John's mastery extends to 3GPP standards, where he served as Vice Chairman of the MIPI RFFE standard working group, contributor to the MIPI RIO and TSG standards, and collaborated with multiple 3GPP RAN working groups.

A proud alum of Texas A&M University, John extends his commitment to cybersecurity through his role as a Board member of the Florida Institute for Cybersecurity Research (FICS). His influence transcends boundaries, shaping the trajectory of digital innovation and security for years to come. A sought-after keynote speaker and panelist at cybersecurity, advanced packaging, and semiconductor design conferences, John's insights drive industry discourse forward.

Beyond his professional endeavors, John is a Ruby Life Master at the American Contract Bridge League (ACBL) and an enthusiastic player of strategy and role-playing games.

Kashyap Yellai joined SRC as a program manager in 2022. Kashyap leads Logic & Memory Devices (LMD), Nanomanufacturing Materials & Processes (NMP) and Environment, Safety & Health (ESH) programs which are part of Global Research Collaboration (GRC). Prior to joining SRC, Kashyap successfully led the start-up and ramp of Intel’s Optane Memory research and development center. Kashyap has lot of experience in research and development and high-volume manufacturing of NAND and Optane memories. Kashyap is very passionate about of technology transfer and scaling to high volume manufacturing.

Kashyap received his MBA from University of Utah, UT and MS in Physics and Materials Science from Auburn University, AL. Outside work Kashyap enjoys swimming and developing chess playing skills.