Participating Organizations



  • 3D Glass Solutions, Inc.
  • AMD
  • Amazon
  • America's Frontier Fund
  • Analog Devices
  • Ansys
  • Applied Materials
  • Arizona State University
  • ARM
  • ASM
  • Binghamton University
  • Bosch
  • Boeing
  • Broadcom
  • Cadence
  • Cardea Bio
  • Cirrus Logic
  • Cisco Systems Inc.
  • Clarkson University
  • DARPA
  • Darthmouth College
  • Duke University
  • eFabless
  • Electronic Innovations
  • Entegris
  • Ereztech
  • Finwave Semi
  • GA Tech
  • GlobalFoundries
  • Google
  • Hewlett Packard Enterprise
  • Howard University
  • IBM
  • IMEC
  • IIT/Kanpur - India
  • Innovation Impact Partners
  • Intel Corporation
  • Iowa State University
  • IPC
  • Kepler Computing
  • Khalifa University - UAE
  • King Abdullah Univ Sci & Tech
  • Los Alamos National Laboratories
  • Lumoniq
  • Mass. Institute of Technology
  • Materials Research Society
  • MedCrypt
  • MediaTek
  • Memcus
  • Micron Technology, Inc.
  • Microsoft
  • MITRE
  • Morgan State University
  • Mubadala Technology
  • NIST
  • Nokia
  • North Carolina A&T State University
  • North Carolina State University
  • Northrop Grumman
  • NXP Semiconductors
  • Oak Ridge National Laboratory
  • Oregon State University
  • Pacific Northwest National Laboratory
  • Penn State University
  • Purdue University
  • Qualcomm
  • Raytheon Technologies
  • Razdan Research Institute
  • Redwood EDA
  • Rigaku
  • Rochester Inst. Tech.
  • Samsung Electronics Co., Ltd.
  • Sandia National Lab
  • SEMI
  • Semiconductor Research Corporation
  • Siemens EDA
  • Silicon Intervention Inc.
  • Si Ware Systems
  • SK hynix Inc.
  • Skywater Technologies
  • SLAC
  • Softmems
  • Stanford University
  • SUNY Polytechnic Institute
  • Synopsys, Inc.
  • Texas Instruments Incorporated
  • Tokyo Electron Ltd.
  • TELUS
  • Tower Semiconductor
  • TSMC
  • Twist Bioscience
  • Uhnder
  • UC/Irvine
  • UC/San Diego
  • UC/Santa Barbara
  • Univ. Florida
  • University of Illinois, Urbana-Champaign
  • University of Guelph
  • University of Michigan
  • University of Minnesota
  • University of Notre Dame
  • UT/Dallas
  • University of Sheffield
  • University of Toronto
  • University of Wisconsin-Madison
  • Washington State University
  • Western Digital Corporation
  • X-Celeprint
  • Zero Asic

NIST Microelectronic and Advanced Packaging Technologies (MAPT) Roadmap

Objective

The main objective of this initiative is to accelerate United States’ leadership in semiconductors, where the industry-relevant opportunities lie at the confluence of Microelectronic and Advanced Packaging Technologies, or MAPT. SRC and its partners will accomplish this by: (1) forming a consortium that includes stakeholders from all parts of the supply chain, (2) identifying emerging applications that will drive future microelectronics and packaging needs, and (3) developing a roadmap that guides technology development, manufacturing advances, and workforce development. The roadmap will support continued efforts by the consortium and other groups as a guide for the broader R&D community and future Manufacturing USA Institutes in microelectronics and advanced packaging.

Advanced Packaging, along with 3D monolithic and heterogeneous integration, will be the key enabler of the next microelectronic revolution. In fact, advanced packaging+3D is becoming the equivalent of transistor of the 2D Moore’s Law era. This initiative closely aligns with SRC’s Decadal Plan, which stresses the urgency of increased research funding in this area.  

MAPT is a critical multidisciplinary field with the potential to transform the design and manufacture of future microchips. These advances build upon breakthroughs in advanced packaging, 3D monolithic and 2.5D/3D heterogeneous integration, electronic design automation, nanoscale manufacturing, and energy-efficient computing. The Semiconductor Research Corporation’s 2030 Decadal Plan for Semiconductors identified five seismic shifts to attack through innovative MAPT research and development.

Related Links

SRC Press Release announcing Interim Report for MAPT Roadmap (March 2023)

SRC 2030 Decadal Plan for Semiconductors

Request for Information submitted to Commerce:Incentives, Infrastructure, and Research and Development Needs to Support a Strong Domestic Semiconductor Industry

SRC Press Release featuring NIST Award (April 2022)

MAPT Roadmap Technical Working Groups

    • TWG A: Workforce Development
    • TWG B: Application Drivers & System Requirements
    • TWG C: Advanced Packaging & Heterogeneous Integration
    • TWG D: Digital Processing
    • TWG E: AMS Processing
    • TWG F: Photonics & MEMS

Crosscuts

    • Crosscut I: Manufacturing and Process Metrology
    • Crosscut II: Sustainability & Energy Efficiency
    • Crosscut III: Design, Modeling, Test, and Standards
    • Crosscut IV: Supply Chain: Materials, Chemicals, Substrates
    • Crosscut V: Security and Privacy

Victor Zhirnov, Chief Scientist

zhirnovVictor Zhirnov is Chief Scientist at the Semiconductor Research Corporation. He is responsible for envisioning new long-term research directions in semiconductor information and communication technologies for industry and academia. Victor serves as the Chair for the 2030 Decadal Plan for Semiconductors and as the Director for the MAPT Roadmap.

4819 Emperor Blvd, Suite 300 Durham, NC 27703 Voice: (919) 941-9400 Fax: (919) 941-9450

Important Information for the SRC website. This site uses cookies to store information on your computer. By continuing to use our site, you consent to our cookies. If you are not happy with the use of these cookies, please review our Cookie Policy to learn how they can be disabled. By disabling cookies, some features of the site will not work.