2022 Innovation Award
US7672152B1: “Memory cell with built-in process variation tolerance”
Professors Kaushik Roy (Purdue) and Jaydeep Kulkarni (UT/Austin and Purdue)
Issued in 2010, this influential research started with Focus Center Research project #888.020 which continued with #1078.002 and 1629.001.
During his Ph.D. program at Purdue, Dr. Kulkarni explored ultra-low-voltage IC design topics under the guidance of Prof. Roy. They successfully demonstrated a pioneering memory bitcell topology based on the Schmitt Trigger principle that can directly replace conventional 6 Transistor SRAM bitcell. Incorporating Schmitt Trigger in an SRAM topology was a new concept in the Solid-State Circuits Society. This work described the principles of sub-threshold design very clearly, explained novel circuit techniques, and discussed the valuable design trade-offs. Silicon prototype showed successful operation down to 160mV. This research has influenced many subsequent low-voltage designs, sense amplifier designs, and hardware security circuits, as evidenced by more than 900 citations and two US patents. This research has been recognized with the 2015 IEEE Transactions on VLSI systems best paper award, Purdue ECE outstanding doctoral dissertation award to Dr. Kulkarni, SRC’s inventor recognition awards (2x), SRC TECHCON best paper in session award, ISLPED design contest award, and the Intel Foundation Ph.D. fellowship award to Dr. Kulkarni. These numerous exceptional recognitions by scholars and researchers in the IC design field are a true testimony to this pioneering research.