Secure, Trustworthy, Assured and Resilient Semiconductors and Systems (STARSS) Workshop

  • Date:
    Wednesday, May 21, 2014, 6 p.m. — Thursday, May 22, 2014, 5 p.m. PT
    Location:
    Fairmont Hotel, Gold Room, 170 Market Street, San Jose, CA, United States
    Event ID:
    E005440
E005440 image

This invitation only T3S workshop will convene experts from industry, academia and government to assess the threats, capabilities and gaps related to secure, trustworthy, assured and resilient semiconductors and systems, and to identify research to improve these characteristics without unduly impacting cost or performance.

Organizing Committee

  • Ron Perez, AMD
  • Claire Vishnik, Intel
  • Chris Daverse, SRC (Consultant)
  • Celia Merzbacher, SRC

4819 Emperor Blvd, Suite 300 Durham, NC 27703 Voice: (919) 941-9400 Fax: (919) 941-9450

Important Information for the SRC website. This site uses cookies to store information on your computer. By continuing to use our site, you consent to our cookies. If you are not happy with the use of these cookies, please review our Cookie Policy to learn how they can be disabled. By disabling cookies, some features of the site will not work.