Neuromorphic Chips: Addressing the Nanostransistor Challenge by Combining Analog Computation with Digital Communication
Abstract: As transistors shrink to nanoscale dimensions, trapped electrons—blocking “lanes” of electron traffic—are making it difficult for digital computers to work. In stark contrast, the brain works fine with single-lane nanoscale devices that are intermittently blocked (ion channels). Conjecturing that it achieves error-tolerance by combining analog dendritic computation with digital axonal communication, neuromorphic engineers began emulating dendrites with subthreshold analog circuits and axons with asynchronous digital circuits in the mid-1980s. Three decades in, they achieved a consequential scale with Neurogrid, the first neuromorphic system with billions of synaptic connections. Researchers then tackled the challenge of mapping arbitrary computations onto neuromorphic chips in a manner robust to lanes intermittently—or even permanently—blocked by trapped electrons. Having demonstrated scalability and programmability, they now seek to encode continuous signals with spike trains in a manner that promises greater energy efficiency than all-analog or all-digital computing across a five-decade precision range.