An Efficient Implementation of a Liquid State Machine on the Spiking Temporal Processing Unit

Abstract: The spiking temporal processing unit (STPU) is a digital neuromorphinc architecture based on the following three neuroscience principles observed in the brain: 1) the brain is composed of simple processing units (neurons) that operate in parallel and are sparsely connected, 2) each neuron has its own local memory for maintaining temporal state, and 3) information is encoded in the connectivity, efficacy, and signal propagation characteristics between neurons. A highlevel overview of a biological neuron and how its components map onto the STPU are shown in Figure 1. Each neuron in the STPU is a leaky integrate and fire (LIF) neuron [1]. Unique to the STPU, each neuron has a local temporal memory buffer. The temporal buffer represents different synaptic junctions in the dendrites where a lower index value in the temporal buffer constitutes a dendritic connection closer to the soma and/or a shorter axon length than one with a larger index value. Thus, synapses in the STPU are specified as a weight Wkjd from a source input neuron k, to a destination neuron j in the d(th) cell of the temporal buffer. This allows multiple connections between neurons with different synaptic weights and delays. In the STPU, each cell in the temporal buffer is a summation of the product of the inputs and synaptic weights.