Verification, Validation, and Test of Machine Learning (V-TML) Systems Workshop
The application of machine learning algorithms and techniques have dramatically increased over the past several years, since it has seemingly limitless potential to change the way systems are optimized and interact with the world around them. Autonomous systems with machine learning built-in, just around the corner, the question is, what will the electronic design automation (EDA) community do to handle the verification, validation, and test of such systems?
This workshop will address the current state-of-the-art and formulate the key research needs in charting a path forward towards enabling the safe, reliable, and predictable application of machine learning to emerging applications.
Attendance at the workshop is an invitation-only meeting, but open to NSF. For more information contact david.yeh@src.org.
Click for the final report.
Session Topics
- Current Research Activities
- Data
- Explain-ability
- Robustness
- EDA - Verification
- EDA - Validation and Test
- Research Needs Panel