Request for White Papers in Test and Testability Research
The Semiconductor Research Corporation periodically reviews its research portfolio to assure a balance of university research to meet the needs of SRC member companies in the 3-8 year time frame. The Computer-Aided Design and Test science area of SRC anticipates being able to add to this work a small number of research tasks in test and testability in 2000, with additional work being added as funds become available in 2001.
Member needs in this area at this time are in the areas of mixed-signal test, at-speed test, and signal integrity test, and are outlined in the needs document on the SRC Web site. Interested researchers should note the proposal and review schedule below. These steps will permit the funding of projects in October 2000. Following submission of a one-page white paper in the specified format by June 22, 2000, SRC member company reviewers will select a group from which full, university-approved proposals will be requested by August 11, 2000. Proposals for funding will be selected from these submissions, with contract starts anticipated October 1, 2000.
White papers should address research with a 3-8 year time horizon, and outline a three-year program. It is estimated that only 2-3 contracts, supporting 1-2 students each, will be able to be supported. White papers that are not selected will be considered in next year's test solicitation. The calendar for this proposal cycle is as follows:
White Paper and Proposal Timetable | |
---|---|
Event | Date |
Publication of RFWP | June 1, 2000 |
Deadline to Submit White Papers | June 22, 2000 |
Proposals requested | July 20, 2000 |
Deadline to Submit Proposals | August 11, 2000 |
Contract Awards Announced | September 18, 2000 |
Funding start | October 1, 2000 |
If you know of other interested parties, please feel free to make them aware of this solicitation. Submissions will be considered from North American universities, in keeping with normal SRC policy.
Please direct all questions to William Joyner, Director of Computer-Aided Design and Test, (919) 941-9400, joyner@src.org.