Program Announcement: Packaging and Interconnect Systems - Novel Concepts For Research

Goal

The goal of the Packaging and Interconnect Systems (Pkg/Int) Concepts For Research (CFR) program is to foster new exploratory, high-risk university research leading to novel high-payoff solutions for the Pkg/Int technology challenges faced by the semiconductor industry at and beyond the time horizons of the SIA International Technology Roadmap for Semiconductors (ITRS). This announcement primarily solicits novel concepts outside the currently investigated options for advanced Pkg/Int solutions. To be acceptable, white papers that do address currently investigated options must propose radically new approaches that circumvent the difficulties of present investigations. Alternate Pkg/Int concepts are solicited that have the potential to dramatically change the paradigm that interfaces die within a package, or the interface between the chip and the outside world. Such radical alternatives would normally be thought to require extended time for transition to implementation. Of interest also are radical concepts that, if successful, would allow nearer term implementation while still solving problems of the n+3 node and beyond. Successful projects may involve synergistic research across normal disciplinary boundaries that offers innovative/disruptive solutions supporting the continuation of the Moore's Law cost/performance improvement cadence.

Participation

This Call for Research is open to all universities, domestic and international. It is open to participation by individual investigators, small teams, and Centers. The SRC reserves the right to fund all, some, or none, of the proposed work, depending on the quality of proposals received and availability of funds. The SRC also reserves the right to negotiate with any multi-investigator proposers to increase/reduce/modify the team to meet funding and/or synergy goals.

Role

The role of the Pkg/Int CFR program is to stimulate non-traditional thinking about the issues facing the continuation of interconnect technology beyond the boundaries of the ITRS. The Pkg/Int CFR program is intended to complement the traditional SRC Pkg/Int research program. The CFR awards are intended to provide seed funding for researchers that have radical concepts for future generation packaging and interconnect systems, and will typically be provided as a one-year study contract. Researchers who feel that their concepts are sufficiently mature may propose three year contracts.

Expectations

Participants in the Pkg/Int CFR program will be invited to participate in an annual review to describe the results of their study, and in the case of grants participants will be requested to develop a proposal for follow-on funding for expanded 3 year programs. Program funding will depend on the availability of funds and alignment with the SRC strategic directions.

Background

Areas addressed by this Novel Concepts CFR include, but are not limited to, the following:

  • Design concepts and system level design and modeling tools for chip and package systems to merge the electrical power distribution requirements of the chip and package functions into one power distribution technology distributed appropriately between package and the chip, potentially irrespective of the die-package partition, in order to optimize performance and reduce the cost of global system interconnect;
  • Novel Concepts for packaging and interconnecting fragile and/or non-conventional devices to the outside world;
  • Novel Concepts that leverage the use of low-cost, microelectronic and related fabrication processes performed in a semiconductor factory. These concepts may utilize MEMS, mechanical interconnect, alternate interconnect, compliant interconnect, or other means and be optimally integrated with the chip manufacturing process. The goal of these approaches would be to improve electrical, thermal, and mechanical performance using low-cost processes and methodologies;
  • Novel Concepts to dramatically change the electrical and thermo-mechanical interfaces between the chip and the outside world using novel or revolutionary materials and fabrication technologies (e.g., optical interconnect, RF techniques or others) to simultaneously achieve high-performance and very low cost chip packages.
  • Novel Concepts that dramatically improve heat dissipation and thermal management

White Papers and Schedule

The White Paper for a Pkg/Int CFR award is limited to two pages in length and should describe the planned research approach, possible research outcomes, and the long-term significance to the semiconductor industry if successful. An estimated time duration and total cost for the program should also be included. White papers are due at the SRC no later than close of business, January 31, 2002. Notification of white paper review results are expected to be completed by March 1. Solicited proposals will be required by April 1, and program starts are anticipated July 1. These are tentative dates that may change, depending on circumstances.

Questions regarding the intent and scope of the CFR Program are to be addressed to:
Dr. Harold H. Hosack
Telephone: (919) 941-9485
E-mail: hosack@src.org

White Paper Structure (strict limit of two pages):

  1. Project name:
  2. Investigators:
  3. University:
  4. Mailing address:
  5. Telephone number and e-mail address:
  6. Problem to be addressed: Explain the rationale for the project in terms of the semiconductor industry needs.
  7. Objective: What do you plan to do?
  8. Novelty:: Please discuss the role of this research in providing a unique solution to the problem addressed.
  9. Approach: Strategy for addressing the problem.
  10. Research output: Please identify possible research products of a successful program.
  11. Time and funding requested.

Submission Instructions

  • Electronic submission of white papers is required.
  • Please submit WORD or PDF files using Arial, Courier, Times Roman or Helvetica fonts.
  • Please use fonts of 10-point size or larger.

Submission Deadline: January 31, 2002 at 5:00 PM EST.

 

 

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