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P093916 GRC Paper

A Digital Low-Dropout Regulator with Auto-Tuned PID Compensator and Dynamic Gain Control for Improved Transient Performance under Process Variations and Aging

Arvind Singh (Georgia Tech), Monodeep Kar (Intel), Venkata Chaitanya Kr Chekuri (Georgia Tech), Saibal Mukhopadhyay (Georgia Tech)

Received 11-Jul-2018
P093907 GRC Paper

Broadband Power Amplifier Architecture with Multi-Port Dynamic Load Modulation for Spectrally Efficient Communication in 5G Applications

Chandrakanth R. Chappidi (Princeton), Kaushik Sengupta (Princeton)

Received 11-Jul-2018
P093904 GRC Paper

Efficient System-In-Package based Energy Harvesting for IoT Devices with Co-Design of Integrated Voltage Regulators and Embedded Inductors

Edward Lee (Georgia Tech), Colin Pardue (Georgia Tech), Madhavan Swaminathan (Georgia Tech), Saibal Mukhopadhyay (Georgia Tech)

Received 11-Jul-2018
P093900 GRC Paper

An All-Digital Fully-Integrated Unified Clock and Power (UniCaP) Architecture with Switched-Capacitor Voltage Regulator for Variation Tolerance in a Near/Sub-Threshold Operation

Fahim ur Rahman (Univ. of Washington), Xun Sun (Univ. of Washington), Visvesh S. Sathe (Univ. of Washington)

Received 11-Jul-2018
P093893 GRC Deliverable Report

Reconfigurable MM-Wave TX Architecture and Antenna Interface With Active Impedance Synthesis in Multi-Port Node-Conjugated Combiner

Research Report Highlight

TxACE researchers at Princeton report on the design of a multi-band PA for 5G that is back-off efficient across the frequency range (30-70 GHz) and has the capability to overcome antenna impedance mismatches and process variations.

Kaushik Sengupta (Princeton), Chandrakanth R. Chappidi (Princeton)

Received 11-Jul-2018
P093888 GRC Paper

Silicon Bandgap Voltage VGO Extraction for Designing Sub-ppm/℃ Voltage References

Nanqi Liu (Iowa St Univ.), Degang Chen (Iowa St Univ.), Randall L. Geiger (Iowa St Univ.)

Received 11-Jul-2018
P093885 GRC Paper

Thermal Analysis of 3D ICs with TSVs Using System Level Simulations

Zongqing Ren (UC/Irvine), Ayed S. Alqahtani (UC/Irvine), Nader Bagherzadeh (UC/Irvine), Jaeho Lee (UC/Irvine)

Received 10-Jul-2018
P093873 GRC Paper

Test Techniques to Approach Several Defect-per-billion for Power ICs

Anurag Tulsiram (Univ. of Florida), William R. Eisenstadt (Univ. of Florida)

Received 10-Jul-2018
P093871 GRC Paper

Stretchable Circuits Using 3D Printing and Liquid Metal Interconnects

Callen Votzke (Oregon State Univ.), Matthew Johnston (Oregon State Univ.), Uranbileg Daalkhaijav (Oregon State Univ.), Yigit Menguc (Oregon State Univ.)

Received 10-Jul-2018
P093866 GRC Paper

A Highly-Digital Time-Assisted Delta-Sigma Architecture for IoT Applications

Sanjeev Tannirkulam Chandrasekaran (Univ. at Buffalo), Arindam Sanyal (Univ. at Buffalo)

Received 10-Jul-2018
P093853 GRC Paper

Better-Than-Worst-Case Design Methodology for a Compact Integrated Switched-Capacitor DC-DC Converter

Dongkwun Kim (Columbia), Suyoung Bang (Intel), Minki Cho (Intel), Seongjong Kim (Intel), Suhwan Kim (Intel), Mingoo Seok (Columbia)

Received 10-Jul-2018
P093787 GRC Deliverable Report

Frequency-Domain ADC-Based Serial Link Receiver Architectures for 100+Gb/s Serial Links

Research Report Highlight

TxACE researchers at TAMU report on a reconfigurable ADC-based frequency domain link receiver that is robust to jitter by either employing multiple channels or by splitting a PAM-M baseband signal into multiple frequencies before the ADC.

Yuanming Zhu (Texas A&M), Shengchang Cai (Texas A&M), Shiva Kiran (Texas A&M), Sebastian Hoyos (Texas A&M), Samuel M. Palermo (Texas A&M)

Received 3-Jul-2018
P093777 GRC Deliverable Report

Device Simulations on Parasitic PNP Structures under ESD Conditions

Research Report Highlight

TxACE researchers at Arkansas report on device simulations of parasitic PNP structures under ESD conditions. The simulations show the early results on controlling the triggering voltage of the parasitic PNP in the P+/Nwell diode.

Zhong Chen (U Arkansas/Fayetteville)

Received 1-Jul-2018
P093768 GRC Paper

Ring Oscillator Based Delta-Sigma ADCs

Mohammadhadi Danesh (Univ. at Buffalo), Sanjeev Tannirkulam Chandrasekaran (Univ. at Buffalo), Arindam Sanyal (Univ. at Buffalo)

Received 29-Jun-2018
P093762 GRC Deliverable Report

A Spur Calibration Technique for Frequency Multipliers

Research Report Highlight

TxACE researchers at UC/Berkeley report on a spur calibration and suppression method for frequency multiplication. A testchip has been fabricated and testing will begin when returned.

Ali M. Niknejad (UC/Berkeley), Yi-An Li (UC/Berkeley)

Received 28-Jun-2018

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Viewing 46 - 60 of 129

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	ACE4S	ATIC-SRC Center of Excellence for Energy Efficient Electronics Systems
	EBSM	SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing
	TxACE	Texas Analog Center of Excellence
	CHIRP	Center for Heterogeneous Integration Research on Packaging

	CADTS	Computer Aided Design & Test Sciences 1999–2014
	CSR	Cross-disciplinary Semiconductor Research 1999–2014
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	E2CDA-NRI	Energy Efficient Computing: from Devices to Architecture

A Digital Low-Dropout Regulator with Auto-Tuned PID Compensator and Dynamic Gain Control for Improved Transient Performance under Process Variations and Aging

Broadband Power Amplifier Architecture with Multi-Port Dynamic Load Modulation for Spectrally Efficient Communication in 5G Applications

Efficient System-In-Package based Energy Harvesting for IoT Devices with Co-Design of Integrated Voltage Regulators and Embedded Inductors

An All-Digital Fully-Integrated Unified Clock and Power (UniCaP) Architecture with Switched-Capacitor Voltage Regulator for Variation Tolerance in a Near/Sub-Threshold Operation

Reconfigurable MM-Wave TX Architecture and Antenna Interface With Active Impedance Synthesis in Multi-Port Node-Conjugated Combiner

Research Report Highlight

Silicon Bandgap Voltage VGO Extraction for Designing Sub-ppm/℃ Voltage References

Thermal Analysis of 3D ICs with TSVs Using System Level Simulations

Test Techniques to Approach Several Defect-per-billion for Power ICs

Stretchable Circuits Using 3D Printing and Liquid Metal Interconnects

A Highly-Digital Time-Assisted Delta-Sigma Architecture for IoT Applications

Better-Than-Worst-Case Design Methodology for a Compact Integrated Switched-Capacitor DC-DC Converter

Frequency-Domain ADC-Based Serial Link Receiver Architectures for 100+Gb/s Serial Links

Research Report Highlight

Device Simulations on Parasitic PNP Structures under ESD Conditions

Research Report Highlight

Ring Oscillator Based Delta-Sigma ADCs

A Spur Calibration Technique for Frequency Multipliers

Research Report Highlight

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	WIN	Western Institute of Nanoelectronics 2005–2013
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	GSRC	Gigascale Systems Research Center 1998–2013
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