Resonant-Injection-Augmented Field-Effect Transistor (RIAFET) for Low-Voltage Switching
There is ongoing work by many to optimize MOSFETs through use of III-Vs. However, there are fundamental limits on MOSFETs that neither use of III-V's (or more exotic materials) nor non-classical geometries (FinFETs, MUGFETS) can overcome. Among them, the need to minimize off-currents that result from thermionic emission of charge carriers over the gate-controlled channel barrier sets an ~0.5V lower limit on CMOS voltage scaling. A device is considered here through simulation that would leverage III-V MOSFET work to potentially greater benefit by allowing lower voltage operation.
A MOSFET gate controls the barrier height to the channel, but injection efficiency of carriers with enough energy to enter the channel is roughly fixed. In the proposed RIAFET, a III-V multi-well injection barrier adds gate control over injection efficiency. Near the gate on-state = supply voltage, the injection barrier approaches transparency through resonant tunneling, becoming a band-pass filter for electrons; with zero gate voltage the multi-well resonance is eliminated and injection efficiency attenuated. A "side-injection" geometry also is used to optimize performance. An on-off ratio of 104 has been achieved over 160mV gate switching in ballistic simulations, while achieving ~30% injection efficiency in the on state, with much room for design optimization.