A High-Efficiency High-Frequency GaN-Based Three-Level Isolated DC-DC Converter with Dynamic Dead-Time Controlled Synchronous Gate Driver
This paper presents techniques for high-voltage converters to achieve high power efficiency at high switching frequency. A quasi-square-wave zero-voltage switching isolated three-level half-bridge architecture is proposed to minimize the converter switching loss under high-voltage high-frequency conditions. A synchronous three-level gate driver with dynamic dead-time control is also developed to ensure reliability of all eGaN power FETs, automatically generate appropriate dead-time for all power FETs to achieve ZVS with minimal reverse bias behavior, and provide fast propagation delays for high-frequency converter operation. Implemented in a 0.5-μm HV CMOS process, the proposed gate driver achieves 15ns propagation delays and enables a 100V 35W isolated three-level half-bridge converter to achieve the peak power efficiencies of 95.2% and 90.7% at 1MHz and 2MHz, respectively.
Sunday, Sept. 20, 2015, 8 a.m. — Tuesday, Sept. 22, 2015, 10 p.m. CT
Austin, TX, United States
Technical conference and networking event for SRC members and students.