The Case of Database Processing Units

  • Authors:
    Andrea Lottarini (Columbia), Martha Kim (Columbia), Stephen A. Edwards (Columbia), Kenneth Ross (Columbia)
    Publication ID:
    Publication Type:
    Received Date:
    Last Edit Date:
    2384.001 (Harvard University)


The increasing capacity and decreasing cost of DRAM has enabled in-memory databases (IMDBs)–database management systems (DBMSs) that rely primarily on main memory for data storage. Simultaneous to the rise of IMDBs, single core processor performance hit the so-called power wall. To keep power dissipation at bay as technology shrinks, large portions of a chip will have to be powered down at any time. In this context, proposals to accelerate database operations have flourished. However, the integration of these accelerators in a DBMS pose a major challenges. Accelerators require a full materialization of input and output data, which is known to be inefficient. We show how a spatial architecture that connects accelerators using a Network on Chip (NoC) can overcome these difficulties. Our results show an average reduction of memory requests by 49% and a 41% average reduction of query completion time compared to a system with disjoint accelerators.

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