VerilogA Compact Model of a ME-MTJ Based XNOR/NOR Gate

  • Authors:
    Nishtha Sharma (UT/Dallas), Andrew Marshall (UT/Dallas), Jonathan Bird (Univ. at Buffalo), Peter Dowben (U Nebraska/Lincoln)
    Publication ID:
    P087631
    Publication Type:
    Paper
    Received Date:
    3-May-2016
    Last Edit Date:
    30-Nov-2016
    Research:
    2398.001 (University of Nebraska/Lincoln)

Abstract

We present the first VerilogA based models of a Magneto-Electric Magnetic Tunnel Junction (ME-MTJ) based XNOR and NOR logic gate. The ME-MTJ is a low-power beyond-CMOS technology, with possible applications in memory and simple logic devices. The compact models presented here have been developed in the Verilog-A language and validated by electrical simulations using the Cadence SPECTRE and schematic editor. We show simulations of the MEMTJ dual-purpose gate that illustrate integrated memory capabilities. In addition, a full adder based on the proposed XNOR gate is validated.