Non-Volatile Spintronic Memory Array Performance Benchmarking based on Three-Terminal Memory Cell
For the conventional spin torque transfer random access memory (STT-RAM), trade-offs exist between read margin and write energy because both read and write currents pass through the same magnetic tunnel junction (MTJ). To improve the read/write performance and reduce the read disturb rate, three-terminal memory cell structures are investigated and the trade-offs among read and write performance metrics are explored. A uniform memory array-level benchmarking is performed to compare various spintronic write mechanisms, including spin diffusion, spin Hall effect (SHE), domain wall motion, and magnetoelectric effect. Results demonstrate that three-terminal memory cells have the advantage of a small write energy dissipation, and up to two orders of magnitude reduction in the energy-delay product (EDP) is projected for domain wall and magnetoelectric based memory cells.