Non-Volatile Spintronic Memory Array Performance Benchmarking based on Three-Terminal Memory Cell

  • Authors:
    Chenyun Pan (Georgia Tech), Azad J. Naeemi (Georgia Tech)
    Publication ID:
    P090125
    Publication Type:
    Paper
    Received Date:
    21-Jan-2017
    Last Edit Date:
    13-Mar-2017
    Research:
    2624.001 (Georgia Institute of Technology)

Abstract

For the conventional spin torque transfer random access memory (STT-RAM), trade-offs exist between read margin and write energy because both read and write currents pass through the same magnetic tunnel junction (MTJ). To improve the read/write performance and reduce the read disturb rate, three-terminal memory cell structures are investigated and the trade-offs among read and write performance metrics are explored. A uniform memory array-level benchmarking is performed to compare various spintronic write mechanisms, including spin diffusion, spin Hall effect (SHE), domain wall motion, and magnetoelectric effect. Results demonstrate that three-terminal memory cells have the advantage of a small write energy dissipation, and up to two orders of magnitude reduction in the energy-delay product (EDP) is projected for domain wall and magnetoelectric based memory cells.

4819 Emperor Blvd, Suite 300 Durham, NC 27703 Voice: (919) 941-9400 Fax: (919) 941-9450

Important Information for the SRC website. This site uses cookies to store information on your computer. By continuing to use our site, you consent to our cookies. If you are not happy with the use of these cookies, please review our Cookie Policy to learn how they can be disabled. By disabling cookies, some features of the site will not work.