Spintronics: A Potential Pathway to Enable an Exponential Scaling for the Beyond-CMOS Era

  • Authors:
    Jian-Ping Wang (Univ. of Minnesota)
    Publication ID:
    P090627
    Publication Type:
    e-Workshop
    Received Date:
    31-Mar-2017
    Last Edit Date:
    31-Mar-2017
    Research:
    2381.001 (Johns Hopkins University)
    Replay:
    53 minutes
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Abstract

Many key technologies of our society, including artificial intelligence and big data, have been enabled by the invention of transistor and its ever-decreasing size and ever-increasing integration at a large scale. There is a clear scaling limit to the conventional transistor technology, however, and many recently proposed advanced transistors are having an uphill fight in the lab because of necessary performance tradeoffs and limited scaling potential. In this talk, I argue for a new pathway, which involves layering multiple technologies that are beyond the available functions of conventional and newly proposed transistors. Within this context, several successful C-SPIN advances in logic-in-memory, cognitive computing, probabilistic computing and reconfigurable information processing will be briefly discussed. Then, I will introduce my group’s two recent demonstrations. First, I will report the growth of ultra-smooth BixSe(1-x) films on a large silicon wafer with the largest spin Hall angle at room temperature (50 times larger than the best heavy metal W) ever reported using a semiconductor industry compatible sputtering process. I will also report the switching of a perpendicular CoFeB multilayer using spin-orbit torque (SOT) from this BixSe(1-x) with the lowest-ever switching current density reported in a bilayer system: 2.3 × 105 A/cm2 at RT. The giant SHA, smooth surface, ease of growth of the films on silicon substrate, successful growth and switching of a perpendicular CoFeB multilayer on BixSe(1-x) film opens a path for SOT-based memory and logic devices. Then, I will review a longstanding challenge for SOT devices and discuss the limits of previous efforts, by following up with a report on our very recent demonstration of an external-field-free switching SOT device, which is both compatible with a full MTJ stack and scalable down to sub 10 nm.

Past Events

  Event Summary
29 March 2017
STARnet
STARnet
Spintronics: A Potential Pathway to Enable an Exponential Scaling for the Beyond-CMOS Era
Wednesday, March 29, 2017, 1 p.m.–2 p.m. CT
Minneapolis, MN, United States

E-Workshop

4819 Emperor Blvd, Suite 300 Durham, NC 27703 Voice: (919) 941-9400 Fax: (919) 941-9450

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