On-Die Learning: A Pathway to Post-Deployment Robustness and Trustworthiness of Analog/RF ICs
While manufactured ICs are subjected to extensive scrutiny in order to weed out defective or suspicious parts prior to their deployment, a variety of reasons such as silicon aging and adverse operational or environmental conditions might cause the performances of a previously healthy analog/RF IC to fail its design specifications. Similarly, field-activated triggers of hidden capabilities might cause a previously trusted analog/RF IC to exhibit malicious functionality. With analog/RF ICs now prevalent in most electronic systems, due to the rapid growth of wireless communications, sensor applications, and the Internet of Things (IoT), equipping them with robustness and trustworthiness evaluation mechanisms becomes paramount to the applications wherein they are deployed. Such evaluation mechanisms, however, cannot leverage the extensive characterization capabilities of Automatic Test Equipment (ATE) that is typically used for the same purpose prior to IC deployment. Instead, a machine learning-based paradigm, where simple on-die measurements are processed by trained statistical entities to decide on post-deployment IC robustness and trustworthiness is necessitated. To this end, through design, fabrication and characterization of different analog/RF ICs, the research activities described in this presentation seek to demonstrate that on-die intelligence can be cost-effectively integrated to provide post-deployment self-test, calibration and trust evaluation capabilities.
|On-Die Learning: A Pathway to Post-Deployment Robustness and Trustworthiness of Analog/RF ICs|
Friday, April 21, 2017, 1 p.m.–2 p.m. ET
Durham, NC, United States