Post-Silicon Layout Sensitivity Mining: A Pathway to Defect-Driven Test Quality and Yield Improvement

  • Authors:
    Yiorgos Makris (UT/Dallas)
    Publication ID:
    Publication Type:
    Annual Review
    Received Date:
    Last Edit Date:
    2709.001 (University of Texas/Dallas)


This annual report outlines research accomplishments and plans for future work.

Past Events

  Event Summary
15–16 May 2017
CAD and Test Review
Monday, May 15, 2017, 1 p.m. — Tuesday, May 16, 2017, 2 p.m. ET
Atlanta, GA, United States

4819 Emperor Blvd, Suite 300 Durham, NC 27703 Voice: (919) 941-9400 Fax: (919) 941-9450

Important Information for the SRC website. This site uses cookies to store information on your computer. By continuing to use our site, you consent to our cookies. If you are not happy with the use of these cookies, please review our Cookie Policy to learn how they can be disabled. By disabling cookies, some features of the site will not work.