III-V Vertical Nanowire MOSFETs with Band Engineering in the Transport Direction

  • Authors:
    Jesus A. del Alamo (MIT), Xin Zhao (MIT), Dongsung Choi (MIT)
    Publication ID:
    P090923
    Publication Type:
    Annual Review
    Received Date:
    17-May-2017
    Last Edit Date:
    17-May-2017
    Research:
    2655.001 (Mass. Institute of Technology)

Abstract

We demonstrate a new technique to etch III-V vertical nanowires (VNW) with sub-10 nm diameter and high yield. We also show InGaAs VNW MOSFETs with record electrical characteristics in terms of ON-state behavior (transconductance) and OFF-state characteristics (subthreshold swing). Finally, we will present InGaAs/InAs VNW TFETs with subthermal subthreshold behavior over two orders of magnitude of current.

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24 May 2017
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Logic and Memory Devices Review
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