Tunable Reactive Synthesis for Lipschitz-Bounded Systems with Temporal Logic Specifications

  • Authors:
    Marcell Vazquez-Chanlatte (UC/Berkeley), Shromona Ghosh (UC/Berkeley), Vasumathi Raman (Caltech), Alberto Sangiovanni-Vincentelli (UC/Berkeley), Sanjit Seshia (UC/Berkeley)
    Publication ID:
    P090993
    Publication Type:
    Paper
    Received Date:
    26-May-2017
    Last Edit Date:
    30-May-2017
    Research:
    2386.004 (University of California/Berkeley)

Abstract

We address the problem of synthesizing reactive controllers for cyber-physical systems subject to Signal Temporal Logic (STL) specifications in the presence of adversarial inputs. Given a finite horizon, we define a reactive hierarchy of control problems that differ in the degree of information available to the system about the adversary's actions over the horizon. We show how to construct reactive controllers at various levels of the hierarchy, leveraging the existence of Lipschitz bounds on system dynamics and the quantitative semantics of STL. Our approach, a counterexample-guided inductive synthesis (CEGIS) scheme based on optimization and satisfiability modulo theories (SMT) solving, builds a strategy tree representing the interaction between the system and its environment. In every iteration of the CEGIS loop, we use a mix of optimization and SMT to maximally discard controllers falsified by a given counterexample. Our approach can be applied to any system with local Lipschitz-bounded dynamics, including linear, piecewise linear and differentially-flat systems.

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