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Test structure measures impact of random telegraph noise on ring oscillator frequency.
ICSS Featured Publication: Report on the Measurement Results and Test Methodologies for a Random Telegraph Noise (RTN) Monitoring Chip
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SRC, UCLA and ERC Utilize Atomic Layer Etch Analysis to Accelerate Development of Green Chemistries
Modeling of Alternative Chemicals Aims to Replace PFCs in Future Semiconductor Manufacturing
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Wireless transceiver architecture for WBAN applications lowers power into sub-mW range.
ICSS Featured Publication: Report on the Overall Circuit Architecture for RF Transceiver Frontend for Ultra-low Power Body Area Networks that are IEEE 802.15.6 Compliant
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New parallelizable capacitance extraction software achieves 90% parallel efficiency on 8 cores.
CADTS Featured Publication: Final Report on Efficient Capacitance Solver for 3D Interconnect Based on Template Instantiable Basis Functions
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New fractal-state optimization methods for multi-processor systems-on-chip show 70% power savings.
CADTS Featured Publication: An Optimal Control Approach to Power Management for Multi-Voltage and Frequency Islands Multiprocessor Platforms under Highly Variable Workloads
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A magnonic STTRAM is proposed where write is controlled by heat flux, with lower switching energy by 40%.
DS Featured Publication: Report on the Development of MTJ Stacks and Bit-cells to Use Magnons as Assists for Writing – Magnonic MRAM
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TECHCON 2013 - Call for Abstracts
Deadline has been extended until Thursday, February 28, 2013 3:00pm ET. If you have already submitted an abstract there is no need to resubmit. We have begun processing those abstracts already received. Please take this opportunity and upcoming weekend to prepare an abstract to highlight your research efforts and have a chance to present to SRC sponsoring members at TECHCON 2013.
SRC In The News
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What is a TerraSwarm? An interview with TerraSwarm Center Director Edward Lee
Lee: Most of what my team can do is still very much magic to me.
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SRC Applauds Semiconductor Industry Testimony to Congress Supporting Funding of Basic Scientific Research
SRC plays critical role in success of industry, government, academia model that has traditionally propelled U.S. semiconductor industry
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Simulation with ADL model gives 90% timing and energy cycle-accurate results running up to 1800 MIPS.
ICSS Featured Publication: Automated, ADL-Driven Generation of Host-Compiled Platform Models
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Novel post-silicon validation techniques double bug coverage and show huge latency improvement.
CADTS Featured Publication: Technical Report on an Overview of Bug Benchmarks
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20x power reduction seen on examples of IP blocks translated to low power asynchronous implementations.
CADTS Featured Publication: Clocked and Asynchronous Design, Translation, Evaluation, CAD Software, and Verilog Code for 3-4 of the Following Blocks: Modular OCP Interface, FFT, SPI, UART, I2C and I2S
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Radu Marculescu Wins Most Influential Paper Award
Radu Marculescu Wins Most Influential Paper Award
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System-level analysis of FinFET processors can now include power, delay, and PVT variations.
ICSS Featured Publication: McPAT-PVT: Delay and Power Modeling Framework for FinFET Processor Architectures under PVT Variations
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First sub-nanometer 3D imaging demonstrated using STEM through-focal tomography.
NMS Featured Publication: Report on the Effectiveness of Electron Tomography for the Chemical Imaging of Devices at the Nanoscale
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