SRC professor launches exploration into probabilistic spin logic


CAPSL Launches Purdue-P – A Website to Design and Implement Devices that Solve Today's Most Difficult Problems with Probabilistic Spin Logic or p-bits

nCORE’s CAPSL Center, led by Prof. Joerg Appenzeller at Purdue, is exploring a novel type of spintronic device – the so-called probabilistic-bit or "p-bit" – originally proposed by Prof. Supriyo Datta in 2017 in SRC’s C-SPIN Center. The p-bit is a three-terminal device that fluctuates between two states and can be pinned in either one through the third terminal. This allows for a novel type of probabilistic computation as described in the Sept’19 SRC newsletter. 

Now, CAPSL researchers have launched an online effort, called the Purdue-P that allows users to explore the computational power of p-bits in various circuits. On the Purdue-P website, interested visitors will find an overview about p-bits and p-circuits as well as a description of their potential application space. Moreover, the website gives access to two tools – the Purdue-P web simulator and the Purdue-P Coprocessor. These allow exploration of the computational capabilities of p-circuits in greater detail.

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