Increasing Functional Safety Through Collaborative Efforts

30-Jun-2024

A hallmark of the SRC model is the positive cycle of developing research results while maturing the semiconductor industry talent pipeline. Dr. Kanad Basu, an Assistant Professor at University of Texas/Dallas, provides a shining example of the success of this model. Professor Basu has been awarded multiple contracts from SRC, with research projects in the GRC Computer-Aided Design and Test program, the GRC Nanomanufacturing Materials and Processes program, and most recently in GRC’s Artificial Intelligence Hardware program. The Trustworthy and Intelligent Embedded Systems (TIES) Lab, led by Prof. Basu, has been focusing on AI and hardware. Dr. Basu’s SRC work has been recognized by several awards including “Jonsson School Assistant Professor Award, 2024”, “Honorable Mention Award” at VLSID 2021 and “Best Paper Award” at VLSID 2016.

Professor Basu’s students rank among the best, with many securing positions at notable SRC member companies (shown clockwise along with Dr. Basu).

  • Dr. Abraham Kuruvila (PHD Computer Engineering) now works at Samsung as a 5G RAN Engineer
  • Dr. Ayush Arunachalam (PHD Computer Engineering) now works at NXP Semiconductors as a Functional Safety Architect
  • Dr. Shamik Kundu (PHD Computer Engineering) recently joined the Advanced Architecture Research group at Intel

It’s no surprise that hardware systems are getting increasingly more complicated. They face many challenges in safety and security when using the traditional rule-based screening method. During Dr. Basu’s studies, a data-driven anomaly detection framework for AMS functional safety was proposed, which enhances fault injection-based functional safety using machine learning. This framework leverages real-time, in-field data to improve functional safety for automotive SoCs and incorporates an AI-based approach for fault criticality analysis. This discovery will be presented at the Design Automation Conference (DAC) in June 2024 with their paper, “Graph Learning-based Fault Criticality Analysis for Enhancing Functional Safety of E/E Systems.” Indicative of the collaborative nature of SRC sponsored research, co-authors on this paper include liaisons Pooja Madhusoodhanan (TI), Prasanth Viswanathan Pillai (TI), Rubin Parekhji (TI), Arnab Raha (Intel), Suvadeep Banerjee (Intel), and Suriya Natarajan (Intel). Dr. Basu is developing robust and secure low-precision AI hardware, for applications in resource-constrained systems with much improved reliability and safety, and a Generative Adversarial Network (GANs) with predicted safety.

To further the cycle, both Dr. Kundu and Dr. Arunachalam have recently signed up to act as member company liaisons on ongoing SRC research projects. This academic-industry collaboration between UT Dallas, Intel, and TI is developing technologies that will be transferred to commercial companies to revolutionize security and safety fundamentals, resulting in a significantly improved framework. We look forward to the future Dr. Basu, his students, and his alumni will help create!

View Dr. Basu’s projects in Pillar Science: https://app.pillar.science/users/6876

Articled updated 2024/07/11

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