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Today’s leading-edge technology is powered by silicon Fin Field-Effect Transistors (FinFET) at the bottom of the stack. As leading semiconductor manufacturers encounter new challenges at reduced device dimensions, they are intensively researching nanosheet- and nanoribbon-based transistors as the next frontier. FinFets, which have been available commercially since 2011, have been incredibly successful in advancing semiconductor technology but they are facing challenges as we push towards smaller process nodes.

One critical challenge that researchers are addressing is scaling the thickness of a transistor channel made from a 3D material, like silicon, below 3nm without significantly increasing electron scattering due to surface roughness. This is where 2D materials like transition metal dichalcogenides (TMDs) come in. While TMDs are atomically thin and allow the channel thickness to be scaled well below the limits of a 3D material such as silicon, they present many other challenges. Perhaps the most significant is the material’s susceptibility to oxidation and corrosion, especially due to typical semiconductor processing steps for encapsulating or depositing the necessary materials (e.g., gate oxides) at the interface.  

Pennsylvania State University Professor Joshua Robinson and his team of collaborators, including researchers from SRC member company Intel, are facing this challenge head on. We are excited to share that they recently published their research findings, supported by the SRC nCORE NEWLIMITS Center, in a Nature Communications publication.

In the publication, they discuss a new manufacturing approach to advance the integration of 2D electronics such as MoS2. Traditional methods to protect 2D semiconductor materials from oxidation involve oxide-based coatings that use water, which can ironically accelerate oxidation. The researchers aim to mitigate oxidation with a new, water-free method.

The team developed a synthesis process using amorphous boron nitride (a-BN), a non-crystalline form of boron nitride known for its high thermal stability and electrical insulation properties. This new method avoids the use of water entirely and results in a coating that protects TMDs against oxidation, thereby improving the performance and durability of 2D semiconductors.

Figure taken from Figure 4a. of Nature Communications, Chen, C.Y., Sun, Z., Torsi, R. et al. Tailoring amorphous boron nitride for high-performance two-dimensional electronics. Nat Commun 15, 4016 (2024). https://doi.org/10.1038/s41467-024-48429-4

During their exploration of this process, the researchers faced challenges in evenly coating the 2D materials due to the lack of dangling bonds. To address this, they developed a two-step atomic layer deposition (ALD) method, which involves depositing a thin low-temperature a-BN "seed layer" before heating the chamber to typical deposition temperatures. This method resulted in a 30% to 100% improvement in transistor performance compared to devices not utilizing a-BN.

The study highlights the potential of a-BN as a dielectric material for semiconductor devices  and was featured in an AZO Nano article titled “Rust-Resistant Coating for Faster, More Durable Electronics.” The success of this work, and the interest it has generated in the community, suggests that further improvements in material quality could lead to even better performance in future electronics. Principal author Cindy Chen was recently hired by Lam Research, while graduate student Zheng Sun (Purdue) and postdoc Riccardo Torsi (NIST) continue working in similar research spaces.

Congratulations to this team of SRC-funded researchers who are paving a path towards scalable integration of dielectrics for 2D electronics! 

View Dr. Joshua Robinson's SRC nCORE NEWLIMITS Center projects in Pillar Science.