SRC and Environmental Research Center Create New Cyclic Purge Technique to Slash Use of Ultra-High Purity Gas and Energy for Manufacturing

Twenty Percent Reduction in Gas Usage for Equipment Purging and Cleaning Improves Chip Production Sustainability and Efficiency

Jul 16, 2013

RESEARCH TRIANGLE PARK, N.C. – July 16, 2013 – Researchers sponsored by Semiconductor Research Corporation (SRC), the world's leading university-research consortium for semiconductors and related technologies, today announced that they have developed a more efficient purge technique that reduces the consumption of ultra-high purity (UHP) purge gases by more than 20 percent during the production of semiconductors. The new process has been co-developed with Intel Corporation and can be applied to a wide range of manufacturing operations beyond the chip industry.

In response to industry demand, the research performed by the SRC Engineering Research Center (ERC) for Environmentally Benign Semiconductor Manufacturing has focused on minimizing the amount of UHP bulk gases used to purge and clean tools and gas distribution systems. The new technique—called Pressure Cyclic Purge (PCP)—can easily replace the industry’s standard steady-purge method while delivering welcomed energy and gas savings.

Currently, the widely used conventional steady-purge method for cleaning and drying highly sensitive equipment and gas distribution systems requires flowing large amounts of expensive gases  through production equipment and distribution systems; this procedure results in higher cost and waste of consumables. As contamination continues to be a major concern in scaling devices to smaller feature size for enhanced density and performance, the inefficient use of expensive purge gases to eliminate contaminants is a key challenge to the productivity of future IC technologies.

“The widespread use of ultra-pure gas for purging purposes, which essentially all goes to waste, has been a significant environmental and efficiency issue for more than a decade,” said Farhang Shadman, lead researcher and the ERC Director at the University of Arizona for the SRC-funded research. “Reduction of both UHP gas usage as well as the resources used for purification processes are environmental gains in the fab, as well as in the production and supply of these gases.”

Through direct measurement and system simulations, the SRC-supported research has demonstrated that the unique flow and cyclic change in the new PCP technique utilizes substantially smaller amounts of purge gases and achieves the required cleanliness in a shorter period of time. For example, the new approach can accelerate the time for the industry’s standard gas distribution system ‘dry down’ process by greater than 30 percent for large, complex systems with the PCP technique.

“Continual increase in environmental quality and cost-effectiveness are on-going goals for our R&D and we have already demonstrated the benefits of this new approach at several sites,” said Carl Geisert, Senior Principal Engineer at Intel. “As we continue to push reduction of contaminant levels towards the parts per trillion level, collaboration between industry and the ERC is key to continued progress toward our goals.”

In addition to Intel, other SRC members have access to a simulator program that can be customized with the PCP technique for their needs. Tests with the new purge technique suggest that the simulator will be ready for commercialization by early 2014. The PCP technique is expected to be relatively easy to implement with minimal change in hardware or configurations for existing fabs and facilities.

In addition to semiconductor equipment and manufacturing companies, other industries that use ultra-clean gases for planar or patterned surfaces and small structures should also benefit from this technology. For example, makers of optics, optoelectronics and flat panel display are expected to show great interest in the tightly regulated semiconductor manufacturing processes such as the PCP technique. As this new purge technology moves quickly toward commercialization, development is underway for its integration into various process tools.

“This progress is reflective of the kinds of innovative approaches that simultaneously provide environmental gain, process improvement and cost reduction for semiconductor and other industries,” said Bob Havemann, Director of Nanomanufacturing Sciences at SRC. “That’s been the legacy and the mission of the SRC Engineering Research Center in the projects that we conduct jointly with industrial members for the purpose of enhancing the environmental sustainability of semiconductor manufacturing.”

For more information about the research, please visit http://www.erc.arizona.edu/seminar/Current-2011/Dittler-%20Intel%20project-v10.pdf

Contributors for the joint effort include K. Dhane, J. Han, J. Yan, O. Mahdavi, D. Zamani, B. Vermeire and F. Shadman.

About SRC

Celebrating 31 years of collaborative research for the semiconductor industry, SRC defines industry needs, invests in and manages the research that gives its members a competitive advantage in the dynamic global marketplace. Awarded the National Medal of Technology, America’s highest recognition for contributions to technology, SRC expands the industry knowledge base and attracts premier students to help innovate and transfer semiconductor technology to the commercial industry. For more information, visit www.src.org.

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