CRISP-T1
Hardware Support for Massively Parallel Processing in Memory and Storage

Jose Martinez (Cornell University), Theme Leader

Hardware Support for Massively Parallel Processing in Memory and Storage seeks to achieve “bare metal” performance and efficiency, i.e., as close as possible to the inherent bit-level parallelism of the data arrays. It explores novel hardware technologies for embedding processing in or near the data arrays to create intelligent memory and storage (IMS), and what type of mechanisms and abstractions this hardware should present to the software.

CRISP-T1 Metrics

  1. Current

    5 Research Tasks
    8 Universities
    10 Students
    15 Faculty Researchers
    17 Liaison Personnel
  2. This Year

    5 Task Starts
Updated: 21-Feb-2018, 12:05 a.m. ET

4819 Emperor Blvd, Suite 300 Durham, NC 27703 Voice: (919) 941-9400 Fax: (919) 941-9450