CRISP-T1
Hardware Support for Massively Parallel Processing in Memory and Storage

Tajana Rosing (UC/San Diego), Theme Leader

Hardware Support for Massively Parallel Processing in Memory and Storage seeks to achieve “bare metal” performance and efficiency, i.e., as close as possible to the inherent bit-level parallelism of the data arrays. It explores novel hardware technologies for embedding processing in or near the data arrays to create intelligent memory and storage (IMS), and what type of mechanisms and abstractions this hardware should present to the software.

CRISP-T1 Metrics

  1. Last Year

    4 Research Data
  2. Since Inception

    7 Projects
    11 Universities
    108 Research Scholars
    18 Faculty Researchers
    57 Liaisons
    541 Research Data
Updated: 19-Apr-2024, 12:05 a.m. ET

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