Hardware Support for Massively Parallel Processing in Memory and Storage seeks to achieve “bare metal” performance and efficiency, i.e., as close as possible to the inherent bit-level parallelism of the data arrays. It explores novel hardware technologies for embedding processing in or near the data arrays to create intelligent memory and storage (IMS), and what type of mechanisms and abstractions this hardware should present to the software.
Current5 Research Tasks9 Universities64 Students15 Faculty Researchers32 Liaison Personnel
This Year42 Research Publications
Last Year5 Task Starts103 Research Publications1 Patent Applications
Since Inception5 Research Tasks9 Universities68 Students16 Faculty Researchers34 Liaison Personnel145 Research Publications1 Patent Applications