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GRC Science Area
DES – Design Sciences
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Patent Filings
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Wire Width Planning and Performance Optimization for VLSI Interconnect...
- Wire Width Planning and Performance Optimization for VLSI Interconnects Application Type: Utility Patent Number: 6408427 Country: United States Status: Filed on 22-Feb-2000, Issued ...
URL: https://www.src.org/library/patent/p0001/
Modified: 2002-06-18 - 29KB Find Similar Documents
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