Wire Width Planning and Performance Optimization for VLSI Interconnects

• Application Type:

  Utility

  Patent Number:

  6408427

  Country:

  United States

  Status:

  Filed on 22-Feb-2000, Issued on 18-Jun-2002

  Organization:

  University of California, Los Angeles

  SRC Filing ID:

  P0001

Inventors

• Jason Cong (UCLA)
• David Z. Pan (UCLA)