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GRC Science Area
DES – Design Sciences
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5 similar documents, best matches first. |
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- 1:
Method of Fabricating a Self-Aligned High Speed MOSFET Device...
- Method of Fabricating a Self-Aligned High Speed MOSFET Device Application Type: Continuation (in part) Patent Number: 5599728 Country: United States Status: Filed on 28-Oct-1994, ...
URL: https://www.src.org/library/patent/p0006/
Modified: 1997-02-04 - 22KB
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- 2:
ESD/EOS Protection Circuits for Integrated Circuits (Patent P0074...
- ESD/EOS Protection Circuits for Integrated Circuits Application Type: Utility Patent Number: 5450267 Country: United States Status: Filed on 31-Mar-1993, Issued on 12-Sep-1995, ...
URL: https://www.src.org/library/patent/p0074/
Modified: 1995-09-12 - 25KB
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- 3:
Methods, Apparatus and Computer Program products for Synthesizing...
- Methods, Apparatus and Computer Program products for Synthesizing Integrated Circuits with Electrostatic Discharge Capability and Correcting Ground Rule Faults Therein Application ...
URL: https://www.src.org/library/patent/p0049/
Modified: 1998-08-18 - 27KB
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- 4:
Source Contact Placement for Efficient ESD/EOS Protection in...
- Source Contact Placement for Efficient ESD/EOS Protection in Grounded Substrate MOS Integrated Circuit Application Type: Utility Patent Number: 5404041 Country: United States ...
URL: https://www.src.org/library/patent/p0067/
Modified: 1995-04-04 - 25KB
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- 5:
Wire Width Planning and Performance Optimization for VLSI Interconnect...
- Wire Width Planning and Performance Optimization for VLSI Interconnects Application Type: Utility Patent Number: 6408427 Country: United States Status: Filed on 22-Feb-2000, Issued ...
URL: https://www.src.org/library/patent/p0001/
Modified: 2002-06-18 - 29KB
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