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- 1:
Non-Invasive Pre-Bond TSV Test using Ring Oscillators and Multiple...
- Non-Invasive Pre-Bond TSV Test using Ring Oscillators and Multiple Voltage Levels Application Type: Continuation Patent Number: 10444279 Country: United States Status: Filed on ...
URL: https://www.src.org/library/patent/p1635/
Modified: 2019-10-15 - 23KB
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- 2:
Non-Invasive Pre-Bond TSV TestUsing Ring Oscillators and Multiple...
- Non-Invasive Pre-Bond TSV TestUsing Ring Oscillators and Multiple Voltage Levels Application Type: Utility Patent Number: 9478720 Country: United States Status: Filed on ...
URL: https://www.src.org/library/patent/p1392/
Modified: 2016-11-01 - 24KB
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- 3:
Software-Based Self-Test and Diagnosis Using on-Chip Memory ...
- Software-Based Self-Test and Diagnosis Using on-Chip Memory Application Type: Divisional Patent Number: 10788532 Country: United States Status: Filed on 30-Nov-2017, Issued on ...
URL: https://www.src.org/library/patent/p1753/
Modified: 2020-09-29 - 26KB
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- 4:
Software-Based Self-Test and Diagnosis Using on-Chip Memory ...
- Software-Based Self-Test and Diagnosis Using on-Chip Memory Application Type: Divisional Patent Number: 10845416 Country: United States Status: Filed on 30-Nov-2017, Issued on ...
URL: https://www.src.org/library/patent/p1752/
Modified: 2020-11-24 - 26KB
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- 5:
Software-Based Self-Test and Diagnosis Using On-Chip Memory ...
- Software-Based Self-Test and Diagnosis Using On-Chip Memory Application Type: Utility Patent Number: 9864007 Country: United States Status: Filed on 30-Apr-2014, Issued on ...
URL: https://www.src.org/library/patent/p1457/
Modified: 2018-01-09 - 25KB
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- 6:
Testing Monolithic Three Dimensional Integrated Circuits (Patent...
- Testing Monolithic Three Dimensional Integrated Circuits Application Type: Utility Patent Number: 10775429 Country: United States Status: Filed on 2-Nov-2017, Issued on 15-Sep-2020 ...
URL: https://www.src.org/library/patent/p1746/
Modified: 2020-09-15 - 25KB
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- 7:
Scan Test of Die Logic in 3D ICs Using TSV Probing (Patent P1368...
- Scan Test of Die Logic in 3D ICs Using TSV Probing Application Type: Utility Patent Number: 8782479 Country: United States Status: Filed on 1-Nov-2012, Issued on 15-Jul-2014, ...
URL: https://www.src.org/library/patent/p1368/
Modified: 2014-07-15 - 22KB
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- 8:
Multi-Layer Integrated Circuits Having Isolation Cells for Layer...
- Multi-Layer Integrated Circuits Having Isolation Cells for Layer Testing and Related Methods Application Type: Continuation (in part) Patent Number: 10838003 Country: United States ...
URL: https://www.src.org/library/patent/p1826/
Modified: 2020-11-17 - 25KB
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- 9:
Multi-Layer Integrated Circuits Having Isolation Cells for Layer...
- Multi-Layer Integrated Circuits Having Isolation Cells for Layer Testing and Related Methods Application Type: Utility Patent Number: 10338133 Country: United States Status: Filed ...
URL: https://www.src.org/library/patent/p1639/
Modified: 2019-07-02 - 25KB
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- 10:
Retiming-Based Design Flow for Delay Recovery on Inter-Die Paths...
- Retiming-Based Design Flow for Delay Recovery on Inter-Die Paths in 3D ICs Application Type: Utility Patent Number: 8832608 Country: United States Status: Filed on 17-Jun-2013, ...
URL: https://www.src.org/library/patent/p1411/
Modified: 2014-09-09 - 22KB
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- 11:
Signal Tracing Using On-Chip Memory For In-System Post-Fabrication...
- Signal Tracing Using On-Chip Memory For In-System Post-Fabrication Debug Application Type: Utility Patent Number: 9720036 Country: United States Status: Filed on 18-Aug-2014, ...
URL: https://www.src.org/library/patent/p1495/
Modified: 2017-08-01 - 23KB
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- 12:
Signal Tracing using ON-Chip Memory for In-System Post-Fabrication...
- Signal Tracing using ON-Chip Memory for In-System Post-Fabrication Debug Application Type: Continuation Patent Number: 10732221 Country: United States Status: Filed on 26-Jun-2017, ...
URL: https://www.src.org/library/patent/p1733/
Modified: 2020-08-04 - 24KB
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- 13:
Power Switch Design and Method for Reducing Leakage Power in...
- Power Switch Design and Method for Reducing Leakage Power in Low-Power Integrated Circuits Application Type: Utility Patent Number: 8373493 Country: United States Status: Filed on ...
URL: https://www.src.org/library/patent/p1239/
Modified: 2013-02-12 - 22KB
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- 14:
Method and Architecture for Pre-bond Probing of TSVs in 3D Stacked...
- Method and Architecture for Pre-bond Probing of TSVs in 3D Stacked Integrated Circuits Application Type: Utility Patent Number: 8775108 Country: United States Status: Filed on ...
URL: https://www.src.org/library/patent/p1291/
Modified: 2014-07-08 - 22KB
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- 15:
Probabilistic Compute Engine using Coupled Ring Oscillators ...
- Probabilistic Compute Engine using Coupled Ring Oscillators Application Type: Utility Patent Number: 11875272 Country: United States Status: Filed on 26-Mar-2021, Issued on ...
URL: https://www.src.org/library/patent/p1957/
Modified: 2024-01-16 - 24KB
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- 16:
Voltage Controlled Oscillator Using Capacitive Degeneration ...
- Voltage Controlled Oscillator Using Capacitive Degeneration Application Type: Utility Patent Number: 7385452 Country: United States Status: Filed on 7-Feb-2006, Issued on ...
URL: https://www.src.org/library/patent/p0475/
Modified: 2008-06-10 - 22KB
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- 17:
Evaluating Functional Fault Criticality of Structural Faults...
- Evaluating Functional Fault Criticality of Structural Faults for Circuit Testing Application Type: Utility Patent Number: 12008298 Country: United States Status: Filed on ...
URL: https://www.src.org/library/patent/p1929/
Modified: 2024-06-11 - 29KB
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- 18:
Fault Criticality Assessment using Graph Convolutional Networks...
- Fault Criticality Assessment using Graph Convolutional Networks Application Type: Utility Country: United States Status: Filed on 29-Jan-2021, Published by Patent Office ...
URL: https://www.src.org/library/patent/p1956/
Modified: 2021-01-29 - 22KB
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- 19:
Securing Heterogeneous 2.5D ICs Against IP Theft Through Dynamic...
- Securing Heterogeneous 2.5D ICs Against IP Theft Through Dynamic Interposer Obfuscation Application Type: Provisional Country: United States Status: Filed on 22-Dec-2022, Patent ...
URL: https://www.src.org/library/patent/p2108/
Modified: 2022-12-22 - 23KB
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- 20:
Methods and Apparatus for Simultaneously Generating Multiple...
- Methods and Apparatus for Simultaneously Generating Multiple Output Voltage Levels Utilizing Switched Capacitor DC-DC Converter Application Type: Utility Patent Number: 10/651730 ...
URL: https://www.src.org/library/patent/p1794/
Modified: 2020-05-12 - 24KB
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- 21:
Receiver With Colpitts Differential Oscillator, Colpitts Quadrature...
- Receiver With Colpitts Differential Oscillator, Colpitts Quadrature Oscillator, and Common-Gate Low Noise Amplifier Application Type: Divisional Patent Number: 7755442 Country: ...
URL: https://www.src.org/library/patent/p1100/
Modified: 2010-07-13 - 24KB
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- 22:
Receiver With Colpitts Differential Oscillator, Colpitts Quadrature...
- Receiver With Colpitts Differential Oscillator, Colpitts Quadrature Oscillator, And Common-Gate Low Noise Amplifier Application Type: Utility Patent Number: 7414481 Country: United ...
URL: https://www.src.org/library/patent/p0560/
Modified: 2008-08-19 - 24KB
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- 23:
Dual Feeback Loops for Integrated Voltage and Clock Regulation...
- Dual Feeback Loops for Integrated Voltage and Clock Regulation Application Type: Utility Patent Number: 11277141 Country: United States Status: Filed on 4-Mar-2021, Issued on ...
URL: https://www.src.org/library/patent/p1955/
Modified: 2022-03-15 - 23KB
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