Final Report on IC Design for Resilience against System-level ESD

  • Authors:
    Elyse Rosenbaum (UIUC)
    Publication ID:
    P091147
    Publication Type:
    Deliverable Report
    Received Date:
    21-Jun-2017
    Last Edit Date:
    19-Jul-2017
    Research:
    1836.141 (University of Illinois/Urbana-Champaign)

Research Report Highlight

TxACE researchers at UIUC present the final report for the task titled, "IC Design for Resilience against System-level ESD."

Abstract

The SRC-sponsored task on IC Design for Resilience Against System-level ESD has concluded. The three principal students supported on this task have joined member companies—NXP (Robert Mertens), Intel (Nicholas Thomson), and TI (Yang Xiu). Work done as part of this task was recognized with the Best Paper Award from the 2014 EOS/ESD Symposium. The project’s technical accomplishments are summarized in this report.

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