III-V Vertical Nanowire MOSFETs (Option 2 of 2)

Abstract

In the last few years, as Si electronics faces mounting difficulties to maintain its historical scaling path, III-V compound semiconductors, in particular InGaAs, have received a great deal of attention. Sub-10 nm CMOS applications require a 3D transistor geometry. In this regard, the vertical nanowire (VNW) MOSFET represents the ultimate scalable transistor. The gate-all-around nanowire configuration allows for the greatest degree of charge control in the channel. The vertical transport direction uncouples footprint scaling (on the plane of the wafer) from gate length scaling (normal to the wafer) leading to the best possible combination of transistor density and short-channel effects.

At MIT, we are investigating vertical nanowire InGaAs MOSFETs and FinFETs fabricated by a top-down approach. Towards this goal, we have developed Reactive Ion Etching technology for In-containing III-V compounds that yields high aspect ratio structures with vertical and smooth sidewalls. We have also perfected digital etch to controllably thin down fins and vertical nanowires to below 10 nm width/diameter. Using these technologies, we have demonstrated InGaAs VNW MOSFETs and FinFETs with sub-10 nm critical dimensions. In both families of transistors, we have obtained promising electrical characteristics. This talk will review these recent developments, put them in context of the overall progress of Si CMOS and outline the prospects and challenges of III-V transistors for future nanoscale logic.

Bio

Jesús A. del Alamo is the Director of the Microsystems Technology Laboratories at Massachusetts Institute of Technology. He obtained a Telecommunications Engineer degree from the Polytechnic University of Madrid and MS and PhD degrees in Electrical Engineering from Stanford University. From 1985 to 1988 he was with NTT LSI Laboratories in Atsugi (Japan) and since 1988 he has been with the Department of Electrical Engineering and Computer Science of MIT where he currently is the Donner Professor. His current research interests are centered on nanoelectronics based on compound semiconductors for future logic, communications and power management applications. Prof. del Alamo was an NSF Presidential Young Investigator. He is a member of the Royal Spanish Academy of Engineering and Fellow of the IEEE and the APS. He has received the Intel Outstanding Researcher Award, the SRC Technical Excellence Award, and the IEEE EDS Education Award.