Abstract
Amidst today’s data explosion, demand for computing power is accelerating with the need to solve problems that scale exponentially in time and energy. These problems, such as traveling salesman, graph coloring, or pattern recognition, are critical in artificial intelligence, science, engineering, and business for data mining, scheduling and packing optimizations, and even gaming. In order to address these challenging problems, the scientific and engineering community is now exploring new approaches to computing, such as mimicking the brain's structure or a network of coupled particles. However, these approaches are currently being mapped onto the von Neumann computer architecture, which is highly inefficient from both energy and computing standpoints, and as the mapped problems scale up in size and complexity, the required energy and computing time scale exponentially. As a result, there is a pressing need to develop revolutionary architectures and computation modalities that overcome these severe roadblocks and invoke new energy-performance scalability paradigms. We are working on an ambitious program based on photonics and the integration of photonics with electronics, in order to realize new computing paradigms with superior energy scalability.
Researchers from MIT will present their recent research progress on:
Theoretical and experimental progress on Photonic Recurrent Ising Sampler
Integrating photonics with electronics
Prototyping NDP systems with FPGAs
References:
[1] Yichen Shen, Nicholas Harris, et al. "Deep learning with coherent nanophotonic circuits." Nature Photonics 11.7 (2017): 441.
[2] Charles Roques-Carmes et al., Photonic Recurrent Ising Sampler, arXiv:1811.02705
[3] Ryan Hamerly et al., Large-Scale Optical Neural Networks based on Photoelectric Multiplication, arXiv:1812.07614
[4] Mark C. Jeffrey et al., Unlocking Ordered Parallelism with the Swarm Architecture, in IEEE Micro's Top Picks from the Computer Architecture Conferences, May/June 2016
[5] Mark C. Jeffrey et al., Harmonizing Speculative and Non-Speculative Execution in Architectures for Ordered Parallelism, in Proc. MICRO-51, October 2018
