2001 Call for White Papers:
The SRC Cross-disciplinary Semiconductor Research Program (CSR)

Goal
The goal of the Cross-disciplinary Semiconductor Research (CSR) program is to foster exploratory, multi-disciplinary, high-risk university research leading to novel high-payoff solutions for the technology challenges faced by the semiconductor industry at and beyond the time horizons of the International Technology Roadmap for Semiconductors (ITRS). Successful projects will offer innovative and perhaps disruptive solutions to the cost/performance challenges of the semiconductor industry for 2011 and beyond. Proposals are solicited for novel ideas and concepts that are beyond/outside the scope of the ITRS. These can include novel system architecture and embedded software concepts; physics and chemistry of nanostructures/functional materials and their assembly; and new radical concepts on topics that are normally considered beyond the scope of SRC, such as optoelectronics, organic and molecular electronics including nano-tubes, novel switch/interconnect concepts, quantum and DNA computing, biological interfaces etc. Preference will be given to projects that require a true multi-disciplinary approach . (*for examples, see below for tasks funded in CSR 2000).

Role
The role of the CSR program is to stimulate non-traditional thinking about the issues facing the industry and CSR is intended to complement the traditional SRC science area research programs in Computer-Aided Design and Test, Integrated Circuits and Systems, Nanostructures and Integration, and in Materials and Processes. CSR projects are exploratory in nature and should lead to research programs that address challenges identified by ITRS. Funding for a CSR project is provided on a non-renewable grant basis, with a maximum funding not to exceed $40K per project.

Expectations
Participants in the CSR program are to develop a proposal for follow-on funding for expanded programs by the SRC science areas named above, or for funding by other agencies. Follow-on program funding by SRC will depend on the availability of science area funds and alignment with the science area strategic plan.

Eligibility: University Faculty

Proposals and Schedule
The proposal for a CSR grant is limited to five pages in length and should describe the planned research approach, possible research outcomes, and the long-term significance to the semiconductor industry if successful. Proposals are due at the SRC no later than close of business, September 7, 2001 and will be reviewed by the SRC Executive Technical Advisory Board in October 2001. Notifications of the outcome of the review process will be made by mid November 2001..

Questions regarding the intent and scope of the CSR Program are to be addressed to:

Dr. Lalita Manchanda
Phone: 919-941-9400 (SRC)
Phone: 908-582-4682 (Agere Systems)

Dr. Ralph K. Cavin, III
Telephone: (919) 941-9400
E-mail: cavin@src.org

Proposal Structure (strict limit of five pages)

1. Project name:
2. Investigators:
3. University:
4. Mailing address:
5. Telephone number and e-mail address:
6. Problem to be addressed: Explain the rationale for the project in terms of the semiconductor industry needs. (A good resource is the 1999 International Technology Roadmap for Semiconductors - http://www.itrs.net/ntrs/publntrs.nsf)
7. Objective: What do you plan to do?
8. Novelty: Please discuss the role of cross-disciplinary research in providing a unique solution to the problem addressed.
9. Approach: Strategy for addressing the problem.
10. Research output: Please identify possible research products of a successful research program.
11. Funding requested for study grant:

Submission Instructions

• Electronic submission of proposals is required.
• Please forward your submission as a Postscript, PDF or Word document.
• Please use fonts of 10-point size or larger.
• Send Postscript, PDF or Word files as e-mail attachments to
  Ms. Leslie Faiers: faiers@src.org
  Phone: 919-941-9455

Submission Deadline: September 7, 2001 at 5:00 PM EST.

  *CSR tasks funded in 2000

• Cost-Benefit Analysis of Intelligibility: A New Paradigm for Design of Digital Systems and Test of Constituent Components
• Physical Transport Models for Nano-Scale MOS Devices, with Applications for Computer-Aided Design for Next-Generation Integrated Circuits
• Composite Simulation for Integrated Mixed-Signal and Mixed-Technology Microsystems
• Single-Dopant Semiconductor Devices
• New Signaling Scheme Based on Raised Cosine Pulses
• Directed Assembly of Macro-Molecular 3D Nano-Structures
• Fabrication of Single Molecular Junctions for Molecular Electronics
• Engineering Optimization of Solid State Molecular and Bio Molecular Electronic Switches
• Chemically Assembly and Optimized Molecular Electronics Circuitry
• Nuclear Spin Based Memory and Logic in Quantum Hall Semiconductor Nano-structures