Call for White Papers in Design and Tools for Future Systems and Technologies


Semiconductor Research Corp. (SRC) Global Research Collaboration (GRC) is soliciting White Papers in the areas of systems, circuits and tools for the design of novel, energy efficient platforms to collect, communicate, process and store information. The principal goals of this program are to understand and overcome scientific and technical barriers and to produce secure and resilient systems that take advantage of integrated-circuit scaling, heterogeneous integration and functional diversification.The motivation of this call is to target relatively long-term research for GRC. Specifically, the research activities should provide solutions that our members will need in 7–10 years for internal evaluation.

This call, issued to universities worldwide, may be addressed by an individual investigator or a research team. Our selection process is divided into two stages. Interested parties should submit 1-page White Papers describing the proposed research. Investigators or co-investigators may participate in no more than three submissions. Selected White Papers will result in invitations to submit full proposals. A limited number of these proposals will be selected for 3-year research projects. The number and sizes of the contracts awarded will be determined by the amount of available funds and the number of high-quality proposals. The anticipated funding level per project is expected to be in the range of $80K to $120K per year, which includes the overhead expenses charged by the institution. The amount of funding requested will be a factor in the selection process. Proposals that include university/government matching funds are strongly encouraged.

A simultaneous solicitation in Emerging Technologies in Materials, Processes, and Devices is being conducted: see /compete/s201213/.

Research Scope

Specific research topics of high interest to SRC members are summarized below.  Investigators should use standard metrics such as area, power, performance, etc. to show how the research might advance the state-of-the-art and meet long-term member needs.Particular areas of interest include the design and tools needed to enable heterogeneous architectures, analog and mixed-signal applications, embedded memories, and 3D integration.

1. Advanced Digital and Analog Circuits and Systems Design, including I/O Architectures
1.1 Multi-layer system optimization for reliable, resilient and secure system design: reconfigurable, self-adaption, and self-test
1.2 Architectures for enabling exponential increase in communication bandwidth including embedded memory and NOC approaches
1.3  Design for nanophotonic and/or other emerging technologies that enable platforms, interconnect, packaging and design in multicore architectures
1.4 Software concurrency tools, debug and verification capability
1.5 Integration and optimization of heterogeneous system architectures including application software
1.6 Simulation-based design at THz frequencies to avoid multiple design spins
1.7 Architectures targeting 1000x decrease in energy per computation function
2. Advanced Digital and Analog CAD, Test, and Verification
2.1 Longer-range research on design for resilience and reliability, addressing variability, aging, drift, on/off times, lifetime stress models, system-level reliability, etc.
2.2 CAD tools and methodologies for advanced analog synthesis and optimization including statistical approaches
2.3  Verification of complex analog/digital systems
2.4 Predictive design tools and flows for emerging technologies (THz frequencies, 3D, nonvolatile memory, etc.)
2.5 Tools which facilitate orders-of-magnitude power reduction
2.6 Advanced test for mixed-signal systems, nonvolatile memory, 3D systems, etc., including high-speed burn-in test for advanced chips
2.7 CAD and test for nanophotonic interconnect and/or other emerging technologies

White Paper Guidelines

White Papers are limited to one page in length, using a minimum of 10-point font size, and must be submitted via the SRC web-site. Submissions are due by Thursday, September 13, 2012, 3 PM EDT/12 PM PDT. Submissions not in compliance with all guidelines will be excluded from consideration.

Please include the following identifying information in your white paper:

  • Project title
  • Investigator(s)
  • University
  • Principal investigator's contacts (telephone number and e-mail address)
  • Specific topic addressed from the above list (e.g. 1.4)

Please address the following in your white paper:

  • Background: Emphasize area and problem to be addressed; match the most relevant topic addressed (Item #) in the list above; describe why research is being done; rationalize value in terms of semiconductor industry needs.
  • Approach: Present your strategy for addressing the problem, including important findings from your research to date; state the role and novelty of this research in advancing knowledge and state-of-the-art; describe how you plan to interact with SRC member companies.
  • Objective and Results: What do you plan to accomplish in a 3-year program; what is the anticipated output of a successful effort and benefit to SRC members?
  • Funding Request and Participants: Provide a per-year approximation of overall funding requirements which should include overhead charges.  Please indicate the number of students supported and their degrees pursued.  Please also specify matching funds applicable to the proposed research, if any.
  • Background IP - Identify any blocking pre-existing intellectual property on which new results will be based.

Awardees will be expected to:

  • Participate in annual project review
  • Interact with industry liaisons
  • Submit reports for pre-defined deliverables
  • Submit publications resulting from sponsored research
  • Update information about participating students

Timetable and Deadlines

Announcement for Call for White Papers Thursday, August 9, 2012
Deadline to submit white papers Thursday, September 13, 2012  - 3 PM EDT/12 PM PDT
Invitation to submit full proposals Friday, October 19, 2012
Deadline to submit full proposals Tuesday, November 20, 2012 - 3 PM EDT/12 PM PDT
Notification of final selection results Wednesday, January 9, 2013
Program/Funding Start Friday, March 1, 2013

Please direct all technical questions to Dr. William Joyner, (, 919-941-9472). All other questions should be directed to Leslie Faiers (, 919-941-9455).

4819 Emperor Blvd, Suite 300 Durham, NC 27703 Voice: (919) 941-9400 Fax: (919) 941-9450

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