Incorporating Gate Control over a Resonant Tunneling Structure in CMOS to Reduce off-State Current Leakage, Supply Voltage and Power Consumption

    • Application Type:
      Utility
      Patent Number:
      8008649
      Country:
      United States
      Status:
      Filed on 13-Feb-2009, Issued on 30-Aug-2011, Patent Abandoned
      Organization:
      University of Texas at Austin
      SRC Filing ID:
      P1098

    Inventors

    • Sanjay K. Banerjee (UT/Austin)
    • Leonard F. Register (UT/Austin)

    4819 Emperor Blvd, Suite 300 Durham, NC 27703 Voice: (919) 941-9400 Fax: (919) 941-9450

    Important Information for the SRC website. This site uses cookies to store information on your computer. By continuing to use our site, you consent to our cookies. If you are not happy with the use of these cookies, please review our Cookie Policy to learn how they can be disabled. By disabling cookies, some features of the site will not work.