Designing Reliable NML Circuits and Beyond

  • Authors:
    Xiaobo Sharon Hu (Univ. of Notre Dame)
    Publication ID:
    P066585
    Publication Type:
    Presentation
    Received Date:
    7-May-2013
    Last Edit Date:
    8-May-2013
    Research:
    1806.006 (University of Notre Dame)
    1806.007 (University of Notre Dame)
    2383.004 (Pennsylvania State University)

Abstract

To overcome the power challenge facing scaled CMOS electronic systems, alternative technologies are being actively explored. One of the promising candidates, Nanomagnet Logic (NML), employs lithographically defined nanometer-scale magnets to accomplish computation through magnetic dipole-dipole interactions. NML has the potential for low-power dissipation, radiation hardness and non-volatility. In NML, wires, gates and inverters, operating at room temperature, have all been experimentally demonstrated. NML circuits have been designed to process and move information via nearest neighbor coupling. However, the resultant layouts often fail to function correctly. In this talk, the researchers show that a robust NML layout must take into account not only nearest neighbor but also the next nearest neighbor couplings. A new design method is then introduced to address this issue that leverages the minimum-energy states of an NML circuit to guide the physical design process. The talk will end with an outlook of NML technology and architecture advancements.

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