Sub-thermal Subthreshold Characteristics in Top-down InGaAs/InAs Heterojunction Vertical Nanowire Tunnel FETs

  • Authors:
    Xin Zhao (MIT), Jesus A. del Alamo (MIT), Alon Vardi (MIT)
    Publication ID:
    P090978
    Publication Type:
    Paper
    Received Date:
    24-May-2017
    Last Edit Date:
    25-May-2017
    Research:
    2655.001 (Mass. Institute of Technology)

Abstract

This work demonstrates top-down InGaAs/InAs heterojunction vertical nanowire Tunnel FETs with sub-thermal subthreshold characteristics over two orders of magnitude of current. A minimal subthreshold swing of 53 mV/dec at Vds = 0.3 V has been obtained at room temperature. An I 60 (defined as the highest current level where the subthreshold characteristics exhibit a transition from sub- to super-60 mV/dec behavior) of 4.3 nA/ μm has been achieved at Vds = 0.3 V. Compared to an earlier device generation, much reduced temperature dependence of the subthreshold characteristics is observed in this work. The major difference between the two device generations is the drastically reduced interface trap density, evidenced by the improvement in the subthreshold swing of InGaAs vertical nanowire MOSFETs fabricated at the same time. This result suggests oxide-semiconductor interface trap-assisted tunneling the main leakage mechanism in III-V TFETs fabricated by our process. The improvement in the interface quality has been enabled by improved gate oxide deposition and post-deposition treatment.

4819 Emperor Blvd, Suite 300 Durham, NC 27703 Voice: (919) 941-9400 Fax: (919) 941-9450

Important Information for the SRC website. This site uses cookies to store information on your computer. By continuing to use our site, you consent to our cookies. If you are not happy with the use of these cookies, please review our Cookie Policy to learn how they can be disabled. By disabling cookies, some features of the site will not work.