Compact Model for Spin-transfer-torque Magnetic Tunnel Junction Device

  • Authors:
    Shruti R. Kulkarni (New Jersey Inst. Tech.), Deepak Kadetotad (Arizona State), Shihui Yin (Arizona State), Jae-sun Seo (Arizona State), Bipin Rajendran (New Jersey Inst. Tech.)
    Publication ID:
    Publication Type:
    Deliverable Report
    Received Date:
    Last Edit Date:
    2717.001 (New Jersey Institute of Technology)
    2718.001 (Arizona State University)


In this work, we describe a compact model designed for Spin-transfer-torque (STT) RAM device developed in Verilog-A. The model is computationally simple and successfully captures all the high level behavior of memory switching such as programming and read voltages, currents and pulse time-scales. We make use of the Landau-Lifshitz-Gilbert-Slonczewski (LLGS) equation that evaluates the transient behavior of the magnetization vector (M). STT-RAM devices are known have inherent stochasticity in their switching characteristics. Our contribution to this work is introducing stochastic state change into an existing LLGS based STT-RAM model. This holds potential for implementing stochastic synapses for different neural network architectures.

4819 Emperor Blvd, Suite 300 Durham, NC 27703 Voice: (919) 941-9400 Fax: (919) 941-9450

Important Information for the SRC website. This site uses cookies to store information on your computer. By continuing to use our site, you consent to our cookies. If you are not happy with the use of these cookies, please review our Cookie Policy to learn how they can be disabled. By disabling cookies, some features of the site will not work.