Compact Model for Spin-transfer-torque Magnetic Tunnel Junction Device

  • Authors:
    Shruti R. Kulkarni (New Jersey Inst. Tech.), Deepak Kadetotad (Arizona State), Shihui Yin (Arizona State), Jae-sun Seo (Arizona State), Bipin Rajendran (New Jersey Inst. Tech.)
    Publication ID:
    P091230
    Publication Type:
    Deliverable Report
    Received Date:
    30-Jun-2017
    Last Edit Date:
    3-Jul-2017
    Research:
    2717.001 (New Jersey Institute of Technology)
    2718.001 (Arizona State University)

Abstract

In this work, we describe a compact model designed for Spin-transfer-torque (STT) RAM device developed in Verilog-A. The model is computationally simple and successfully captures all the high level behavior of memory switching such as programming and read voltages, currents and pulse time-scales. We make use of the Landau-Lifshitz-Gilbert-Slonczewski (LLGS) equation that evaluates the transient behavior of the magnetization vector (M). STT-RAM devices are known have inherent stochasticity in their switching characteristics. Our contribution to this work is introducing stochastic state change into an existing LLGS based STT-RAM model. This holds potential for implementing stochastic synapses for different neural network architectures.

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