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[x] GRC Science Area
CADTS – Computer Aided Design & Test Sciences
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Patent Filings 29
Events 18
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GRC 36
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2015 1
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TT – Test & Testability 25
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1 through 30 of 47 similar documents, best matches first.   
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1: Software-Based Self-Test and Diagnosis Using On-Chip Memory ...
Software-Based Self-Test and Diagnosis Using On-Chip Memory Application Type: Utility Patent Number: 9864007 Country: United States Status: Filed on 30-Apr-2014, Issued on ...
URL: https://www.src.org/library/patent/p1457/
Modified: 2018-01-09 - 25KB
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2: Software-Based Self-Test and Diagnosis Using on-Chip Memory ...
Software-Based Self-Test and Diagnosis Using on-Chip Memory Application Type: Divisional Patent Number: 10788532 Country: United States Status: Filed on 30-Nov-2017, Issued on ...
URL: https://www.src.org/library/patent/p1753/
Modified: 2020-09-29 - 26KB
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3: Software-Based Self-Test and Diagnosis Using on-Chip Memory ...
Software-Based Self-Test and Diagnosis Using on-Chip Memory Application Type: Divisional Patent Number: 10845416 Country: United States Status: Filed on 30-Nov-2017, Issued on ...
URL: https://www.src.org/library/patent/p1752/
Modified: 2020-11-24 - 26KB
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4: pdfFinal Report - Workshop on Failure and Uncertainty in Mixed-Signal...
National Science Foundation Workshop on Failure and Uncertainty in Mixed-Signal Circuits and Systems Arlington, Virginia July 8-9, 2010 Principal Investigators: Ralph Cavin, ...
URL: https://www.src.org/calendar/e004025/final-report.pdf
Modified: 2011-06-01 - 914KB
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5: TECHCON 2012 (Event E004114) - SRC
TECHCON 2012 Date: Monday, Sept. 10, 2012, 8 a.m. - Tuesday, Sept. 11, 2012, 10 p.m. CT Location: Renaissance Austin Hotel, Austin, TX, United States Event ID: E004114 E004114 ...
URL: https://www.src.org/calendar/e004114/
Modified: 2013-03-11 - 98KB
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6: Power Switch Design and Method for Reducing Leakage Power in...
Power Switch Design and Method for Reducing Leakage Power in Low-Power Integrated Circuits Application Type: Utility Patent Number: 8373493 Country: United States Status: Filed on ...
URL: https://www.src.org/library/patent/p1239/
Modified: 2013-02-12 - 22KB
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7: Multi-Layer Integrated Circuits Having Isolation Cells for Layer...
Multi-Layer Integrated Circuits Having Isolation Cells for Layer Testing and Related Methods Application Type: Utility Patent Number: 10338133 Country: United States Status: Filed ...
URL: https://www.src.org/library/patent/p1639/
Modified: 2019-07-02 - 25KB
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8: Signal Tracing Using On-Chip Memory For In-System Post-Fabrication...
Signal Tracing Using On-Chip Memory For In-System Post-Fabrication Debug Application Type: Utility Patent Number: 9720036 Country: United States Status: Filed on 18-Aug-2014, ...
URL: https://www.src.org/library/patent/p1495/
Modified: 2017-08-01 - 23KB
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9: Signal Tracing using ON-Chip Memory for In-System Post-Fabrication...
Signal Tracing using ON-Chip Memory for In-System Post-Fabrication Debug Application Type: Continuation Patent Number: 10732221 Country: United States Status: Filed on 26-Jun-2017, ...
URL: https://www.src.org/library/patent/p1733/
Modified: 2020-08-04 - 24KB
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10: Non-Invasive Pre-Bond TSV Test using Ring Oscillators and Multiple...
Non-Invasive Pre-Bond TSV Test using Ring Oscillators and Multiple Voltage Levels Application Type: Continuation Patent Number: 10444279 Country: United States Status: Filed on ...
URL: https://www.src.org/library/patent/p1635/
Modified: 2019-10-15 - 23KB
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11: Multi-Layer Integrated Circuits Having Isolation Cells for Layer...
Multi-Layer Integrated Circuits Having Isolation Cells for Layer Testing and Related Methods Application Type: Continuation (in part) Patent Number: 10838003 Country: United States ...
URL: https://www.src.org/library/patent/p1826/
Modified: 2020-11-17 - 25KB
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12: Non-Invasive Pre-Bond TSV TestUsing Ring Oscillators and Multiple...
Non-Invasive Pre-Bond TSV TestUsing Ring Oscillators and Multiple Voltage Levels Application Type: Utility Patent Number: 9478720 Country: United States Status: Filed on ...
URL: https://www.src.org/library/patent/p1392/
Modified: 2016-11-01 - 24KB
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13: Retiming-Based Design Flow for Delay Recovery on Inter-Die Paths...
Retiming-Based Design Flow for Delay Recovery on Inter-Die Paths in 3D ICs Application Type: Utility Patent Number: 8832608 Country: United States Status: Filed on 17-Jun-2013, ...
URL: https://www.src.org/library/patent/p1411/
Modified: 2014-09-09 - 22KB
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14: Scan Test of Die Logic in 3D ICs Using TSV Probing (Patent P1368...
Scan Test of Die Logic in 3D ICs Using TSV Probing Application Type: Utility Patent Number: 8782479 Country: United States Status: Filed on 1-Nov-2012, Issued on 15-Jul-2014, ...
URL: https://www.src.org/library/patent/p1368/
Modified: 2014-07-15 - 22KB
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15: Cost Effective DAC Linearization System (Patent P1749) - SRC
Cost Effective DAC Linearization System Application Type: Utility Patent Number: 10218371 Country: United States Status: Filed on 1-Mar-2018, Issued on 26-Feb-2019 Organization: ...
URL: https://www.src.org/library/patent/p1749/
Modified: 2019-02-26 - 28KB
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16: TECHCON 2011 (Event E004113) - SRC
TECHCON 2011 Date: Monday, Sept. 12, 2011, 8 a.m. - Tuesday, Sept. 13, 2011, 10 p.m. CT Location: Renaissance Austin Hotel, Austin, TX, United States Event ID: E004113 E004113 ...
URL: https://www.src.org/calendar/e004113/
Modified: 2012-03-13 - 97KB
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17: Testing Monolithic Three Dimensional Integrated Circuits (Patent...
Testing Monolithic Three Dimensional Integrated Circuits Application Type: Utility Patent Number: 10775429 Country: United States Status: Filed on 2-Nov-2017, Issued on 15-Sep-2020 ...
URL: https://www.src.org/library/patent/p1746/
Modified: 2020-09-15 - 25KB
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18: Method and Architecture for Pre-bond Probing of TSVs in 3D Stacked...
Method and Architecture for Pre-bond Probing of TSVs in 3D Stacked Integrated Circuits Application Type: Utility Patent Number: 8775108 Country: United States Status: Filed on ...
URL: https://www.src.org/library/patent/p1291/
Modified: 2014-07-08 - 22KB
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19: Characterization Of Radio Frequency (RF) Signals Using Wavelet...
Characterization Of Radio Frequency (RF) Signals Using Wavelet-Based Parameter Extraction Application Type: Utility Patent Number: 7340381 Country: United States Status: Filed on ...
URL: https://www.src.org/library/patent/p0325/
Modified: 2008-03-04 - 23KB
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20: Method for Testing Analog and Mixed-Signal Circuits Using Functionally...
Method for Testing Analog and Mixed-Signal Circuits Using Functionally Related Excitations and Functionally Related Measurements Application Type: Utility Patent Number: 7129734 ...
URL: https://www.src.org/library/patent/p0458/
Modified: 2006-10-31 - 25KB
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21: Method for Testing Analog and Mixed-Signal Circuits Using Dynamic...
Method for Testing Analog and Mixed-Signal Circuits Using Dynamic Element Matching for Source Linearization Application Type: Utility Patent Number: 7587647 Country: United States ...
URL: https://www.src.org/library/patent/p0468/
Modified: 2009-09-08 - 23KB
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22: pdfVertically Integrated Test/Calibration and Reliability Enhancement...
Vertically Integrated Test/Calibration and Reliability Test/Calibration and Reliability Enhancement for Systems with RF/Analog Content RF/Analog Content Sule Ozev Sule.ozev@asu.edu ...
URL: https://www.src.org/calendar/e004025/ozev.pdf
Modified: 2010-07-19 - 54KB
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23: Methods, Apparatus and Computer Program products for Synthesizing...
Methods, Apparatus and Computer Program products for Synthesizing Integrated Circuits with Electrostatic Discharge Capability and Correcting Ground Rule Faults Therein Application ...
URL: https://www.src.org/library/patent/p0049/
Modified: 1998-08-18 - 27KB
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24: TECHCON 2013 (Event E004683) - SRC
TECHCON 2013 Date: Monday, Sept. 9, 2013, 8 a.m. - Tuesday, Sept. 10, 2013, 10 p.m. CT Location: Renaissance Austin Hotel, Austin, TX, United States Event ID: E004683 E004683 image ...
URL: https://www.src.org/calendar/e004683/
Modified: 2014-03-10 - 136KB
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25: Signal Generator with Self-Calibration (Patent P1736) - SRC
Signal Generator with Self-Calibration Application Type: Utility Patent Number: 10116317 Country: United States Status: Filed on 15-Nov-2017, Issued on 30-Oct-2018 Organization: ...
URL: https://www.src.org/library/patent/p1736/
Modified: 2018-10-30 - 24KB
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26: Charge-Based Frequency Measurement BIST (Patent P0557) - SRC
Charge-Based Frequency Measurement BIST Application Type: European Patent Office Patent Number: 1214605 Status: Filed on 19-Jun-2002, Issued on 22-Mar-2006 Organization: University ...
URL: https://www.src.org/library/patent/p0557/
Modified: 2006-03-22 - 23KB
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27: Charge-Based Frequency Measurement BIST (Patent P0185) - SRC
Charge-Based Frequency Measurement BIST Application Type: Utility Patent Number: 6885700 Country: United States Status: Filed on 23-Sep-1999, Issued on 26-Apr-2005, Patent ...
URL: https://www.src.org/library/patent/p0185/
Modified: 2005-04-26 - 24KB
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28: Apparatus for Detecting Bugs in Logic-Based Processing Devices...
Apparatus for Detecting Bugs in Logic-Based Processing Devices Application Type: Utility Patent Number: 10120737 Country: United States Status: Filed on 18-Feb-2016, Issued on ...
URL: https://www.src.org/library/patent/p1597/
Modified: 2018-11-06 - 23KB
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29: India Design Review (Event E005563) - SRC
India Design Review Date: Wednesday, Jan. 7, 2015, 6 p.m. - Thursday, Jan. 8, 2015, 5 p.m. Local Location: Hyatt Bangalore, 1/1, Swami Vivekananda Road, Off M.G. Road, Ulsoor, ...
URL: https://www.src.org/calendar/e005563/
Modified: 2015-02-04 - 82KB
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30: Method for Diagnosing Bridging Faults in Integrated Circuits...
Method for Diagnosing Bridging Faults in Integrated Circuits Application Type: Utility Patent Number: 6202181 Country: United States Status: Filed on 3-Nov-1997, Issued on ...
URL: https://www.src.org/library/patent/p0199/
Modified: 2001-03-13 - 23KB
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1 through 30 of 47 similar documents, best matches first.   
Results by:Thunderstone Page: 1 2 next >>