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CD – Circuit Design 59
PAT – Patterning 43
TT – Test & Testability 35
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I3T – Innovative and Intelligent... 22
HWS – Hardware Security 21
ISD – Integrated System Design 21
LPD – Logic & Physical Design 19
CADT – Computer-Aided Design and... 17
Factory Systems 17
NMP – Nanomanufacturing Material... 15
Pat(MPS) – Patterning 15
PKG – Packaging 14
BEP – Back End Processes 13
NEM – Nanoengineered Materials 13
ASCENT-T1 – Vertical CMOS 12
CRISP-T1 – Hardware Support for ... 9
ADS – Alternative Device Structu... 8
ASCENT-T2 – Beyond CMOS 8
DCMOS – Digital CMOS Technologie... 8
Back End Processes 7
AMML-T1 – Antiferromagnetic Magn... 6
DesTech – Design Techniques 6
Doping Technologies 6
MT – Memory Technologies 6
PatMat – Patterning Materials 6
CFM&TCM – CFM & Total Chemical M... 5
CONIX-T1 – ARENA Integrator 5
VER – Verification 5
CBRIC-T2 – Neuromorphic Fabrics 4
ESH – Environment Safety and Hea... 4
IMPACT-T1 – Materials for Scaled... 4
Packaging & Interconnect Systems 4
Physical Design 4
TechCAD – Technology CAD 4
ADA-T1 – Deft Development 3
AIHW – Artificial Intelligence H... 3
DEEP3M-T4 – Architectures 3
Lithography 3
MTMP – Metrology Tools Matls & P... 3
Masks 3
Materials 3
Modeling & Simulation 3
SemiSynBio – Semiconductor Synth... 3
CBRIC-T1 – Neuro-inspired Algori... 2
CRISP-T3 – Scaling Applications ... 2
ComSenTer-T1 – Systems and Algor... 2
DesSyn – Design Synthesis 2
LMD – Logic and Memory Devices 2
Multi-level Interconnect 2
NEWLIMITS-T2 – 2D Materials Devi... 2
Processes – Processes 2
AMS – Analog and Mixed-Signal De... 1
ASCENT-T4 – Merged Logic Memory ... 1
AdvTech – Advanced Technology 1
C&S – Controls and Sensing 1
CAPSL-T4 – Architectures and Sys... 1
CM – Compact Modeling 1
ComSenTer-T2 – mm-wave/THz ICs a... 1
ComSenTer-T3 – Application-speci... 1
DEEP3M-T2 – Circuits 1
DV – Design Verification 1
Deposition 1
E2CDA2 – E2CDA 2.0 1
Front End Processes 1
IMPACT-T2 – Materials for Storag... 1
Metrology 1
NEWLIMITS-T1 – Novel Computing a... 1
NEWLIMITS-T3 – Advanced Manufact... 1
NEWLIMITS-T4 – Characterization ... 1
Reliability 1
SMART-T1 – Spin-orbit Torque Mat... 1
Synthesis & Verification 1
GRC Science Area
MPS – Material & Process Science... 119
NIS – Nanostructure & Integratio... 100
ICSS – Integrated Circuit & Syst... 92
CADTS – Computer Aided Design & ... 82
NMS – Nanomanufacturing Sciences 82
LIT – Lithography Sciences 41
DS – Device Sciences 33
IPS – Interconnect & Packaging S... 32
MIC – Microstructure Sciences 32
DES – Design Sciences 30
PID – Process Integration & Devi... 28
MBP – Materials & Bulk Processes... 23
INT – Interconnect Sciences 11
MFGPS – Manufacturing Process Sc... 4
ES-H – Environmental Safety & He... 3
FAC – Factory Sciences 1
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1: Multi-Layer Integrated Circuits Having Isolation Cells for Layer...
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URL: https://www.src.org/library/patent/p1826/
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URL: https://www.src.org/library/patent/p1746/
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8: Software-Based Self-Test and Diagnosis Using on-Chip Memory ...
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URL: https://www.src.org/library/patent/p1753/
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9: Software-Based Self-Test and Diagnosis Using on-Chip Memory ...
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URL: https://www.src.org/library/patent/p0579/
Modified: 2007-10-23 - 24KB
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11: Software-Based Self-Test and Diagnosis Using On-Chip Memory ...
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URL: https://www.src.org/library/patent/p1457/
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12: Non-Invasive Pre-Bond TSV TestUsing Ring Oscillators and Multiple...
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URL: https://www.src.org/library/patent/p1392/
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13: Method for Testing Analog and Mixed-Signal Circuits Using Dynamic...
Method for Testing Analog and Mixed-Signal Circuits Using Dynamic Element Matching for Source Linearization Application Type: Utility Patent Number: 7587647 Country: United States ...
URL: https://www.src.org/library/patent/p0468/
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14: Signal Tracing Using On-Chip Memory For In-System Post-Fabrication...
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URL: https://www.src.org/library/patent/p1495/
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15: Signal Tracing using ON-Chip Memory for In-System Post-Fabrication...
Signal Tracing using ON-Chip Memory for In-System Post-Fabrication Debug Application Type: Continuation Patent Number: 10732221 Country: United States Status: Filed on 26-Jun-2017, ...
URL: https://www.src.org/library/patent/p1733/
Modified: 2020-08-04 - 24KB
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16: Non-Invasive Pre-Bond TSV Test using Ring Oscillators and Multiple...
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URL: https://www.src.org/library/patent/p1635/
Modified: 2019-10-15 - 23KB
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17: Built-in Current Testing of Integrated Circuits (Patent P0109...
Built-in Current Testing of Integrated Circuits Application Type: Utility Patent Number: 5025344 Country: United States Status: Filed on 22-Feb-1990, Issued on 18-Jun-1991, Patent ...
URL: https://www.src.org/library/patent/p0109/
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18: Semiconductor Devices Having an Interfacial Dielectric Layer...
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URL: https://www.src.org/library/patent/p0450/
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19: Conductors Created by Metal Deposition Using Selective Passivation...
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URL: https://www.src.org/library/patent/p0447/
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20: Integrated Circuit Devices Having On-Chip Adaptive Bandwidth...
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21: Method of Forming Low-Resistivity RU ALD Through a BI-Layer Process...
Method of Forming Low-Resistivity RU ALD Through a BI-Layer Process and Related Structures Application Type: Utility Country: United States Status: Filed on 6-Dec-2022, Published ...
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29: Method of Forming Metal-Disilicide Layers and Contacts (Patent...
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1 through 30 of 933 similar documents, best matches first.   
Results by:Thunderstone Page: 1 2 3 4 5 6 7 8 9 10 next >>