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GRC Science Area
CADTS – Computer Aided Design & Test Sciences
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- 1:
Software-Based Self-Test and Diagnosis Using on-Chip Memory ...
- Software-Based Self-Test and Diagnosis Using on-Chip Memory Application Type: Divisional Patent Number: 10788532 Country: United States Status: Filed on 30-Nov-2017, Issued on ...
URL: https://www.src.org/library/patent/p1753/
Modified: 2020-09-29 - 26KB
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- 2:
Software-Based Self-Test and Diagnosis Using on-Chip Memory ...
- Software-Based Self-Test and Diagnosis Using on-Chip Memory Application Type: Divisional Patent Number: 10845416 Country: United States Status: Filed on 30-Nov-2017, Issued on ...
URL: https://www.src.org/library/patent/p1752/
Modified: 2020-11-24 - 26KB
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- 3:
Software-Based Self-Test and Diagnosis Using On-Chip Memory ...
- Software-Based Self-Test and Diagnosis Using On-Chip Memory Application Type: Utility Patent Number: 9864007 Country: United States Status: Filed on 30-Apr-2014, Issued on ...
URL: https://www.src.org/library/patent/p1457/
Modified: 2018-01-09 - 25KB
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- 4:
 Final Report - Workshop on Failure and Uncertainty in Mixed-Signal...
- National Science Foundation Workshop on Failure and Uncertainty in Mixed-Signal Circuits and Systems Arlington, Virginia July 8-9, 2010 Principal Investigators: Ralph Cavin, ...
URL: https://www.src.org/calendar/e004025/final-report.pdf
Modified: 2011-06-01 - 914KB
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- 5:
Cost Effective DAC Linearization System (Patent P1749) - SRC
- Cost Effective DAC Linearization System Application Type: Utility Patent Number: 10218371 Country: United States Status: Filed on 1-Mar-2018, Issued on 26-Feb-2019 Organization: ...
URL: https://www.src.org/library/patent/p1749/
Modified: 2019-02-26 - 28KB
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- 6:
TECHCON 2012 (Event E004114) - SRC
- TECHCON 2012 Date: Monday, Sept. 10, 2012, 8 a.m. - Tuesday, Sept. 11, 2012, 10 p.m. CT Location: Renaissance Austin Hotel, Austin, TX, United States Event ID: E004114 E004114 ...
URL: https://www.src.org/calendar/e004114/
Modified: 2013-03-11 - 98KB
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- 7:
TECHCON 2011 (Event E004113) - SRC
- TECHCON 2011 Date: Monday, Sept. 12, 2011, 8 a.m. - Tuesday, Sept. 13, 2011, 10 p.m. CT Location: Renaissance Austin Hotel, Austin, TX, United States Event ID: E004113 E004113 ...
URL: https://www.src.org/calendar/e004113/
Modified: 2012-03-13 - 97KB
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- 8:
Scan Test of Die Logic in 3D ICs Using TSV Probing (Patent P1368...
- Scan Test of Die Logic in 3D ICs Using TSV Probing Application Type: Utility Patent Number: 8782479 Country: United States Status: Filed on 1-Nov-2012, Issued on 15-Jul-2014, ...
URL: https://www.src.org/library/patent/p1368/
Modified: 2014-07-15 - 22KB
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- 9:
Characterization Of Radio Frequency (RF) Signals Using Wavelet...
- Characterization Of Radio Frequency (RF) Signals Using Wavelet-Based Parameter Extraction Application Type: Utility Patent Number: 7340381 Country: United States Status: Filed on ...
URL: https://www.src.org/library/patent/p0325/
Modified: 2008-03-04 - 23KB
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- 10:
Signal Tracing Using On-Chip Memory For In-System Post-Fabrication...
- Signal Tracing Using On-Chip Memory For In-System Post-Fabrication Debug Application Type: Utility Patent Number: 9720036 Country: United States Status: Filed on 18-Aug-2014, ...
URL: https://www.src.org/library/patent/p1495/
Modified: 2017-08-01 - 23KB
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- 11:
Signal Tracing using ON-Chip Memory for In-System Post-Fabrication...
- Signal Tracing using ON-Chip Memory for In-System Post-Fabrication Debug Application Type: Continuation Patent Number: 10732221 Country: United States Status: Filed on 26-Jun-2017, ...
URL: https://www.src.org/library/patent/p1733/
Modified: 2020-08-04 - 24KB
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- 12:
Non-Invasive Pre-Bond TSV TestUsing Ring Oscillators and Multiple...
- Non-Invasive Pre-Bond TSV TestUsing Ring Oscillators and Multiple Voltage Levels Application Type: Utility Patent Number: 9478720 Country: United States Status: Filed on ...
URL: https://www.src.org/library/patent/p1392/
Modified: 2016-11-01 - 24KB
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- 13:
Retiming-Based Design Flow for Delay Recovery on Inter-Die Paths...
- Retiming-Based Design Flow for Delay Recovery on Inter-Die Paths in 3D ICs Application Type: Utility Patent Number: 8832608 Country: United States Status: Filed on 17-Jun-2013, ...
URL: https://www.src.org/library/patent/p1411/
Modified: 2014-09-09 - 22KB
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- 14:
Power Switch Design and Method for Reducing Leakage Power in...
- Power Switch Design and Method for Reducing Leakage Power in Low-Power Integrated Circuits Application Type: Utility Patent Number: 8373493 Country: United States Status: Filed on ...
URL: https://www.src.org/library/patent/p1239/
Modified: 2013-02-12 - 22KB
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- 15:
Charge-Based Frequency Measurement BIST (Patent P0185) - SRC
- Charge-Based Frequency Measurement BIST Application Type: Utility Patent Number: 6885700 Country: United States Status: Filed on 23-Sep-1999, Issued on 26-Apr-2005, Patent ...
URL: https://www.src.org/library/patent/p0185/
Modified: 2005-04-26 - 24KB
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- 16:
Method for Testing Analog and Mixed-Signal Circuits Using Functionally...
- Method for Testing Analog and Mixed-Signal Circuits Using Functionally Related Excitations and Functionally Related Measurements Application Type: Utility Patent Number: 7129734 ...
URL: https://www.src.org/library/patent/p0458/
Modified: 2006-10-31 - 25KB
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- 17:
Method for Testing Analog and Mixed-Signal Circuits Using Dynamic...
- Method for Testing Analog and Mixed-Signal Circuits Using Dynamic Element Matching for Source Linearization Application Type: Utility Patent Number: 7587647 Country: United States ...
URL: https://www.src.org/library/patent/p0468/
Modified: 2009-09-08 - 23KB
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- 18:
Charge-Based Frequency Measurement BIST (Patent P0557) - SRC
- Charge-Based Frequency Measurement BIST Application Type: European Patent Office Patent Number: 1214605 Status: Filed on 19-Jun-2002, Issued on 22-Mar-2006 Organization: University ...
URL: https://www.src.org/library/patent/p0557/
Modified: 2006-03-22 - 23KB
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- 19:
PowerPoint Presentation
- RTI International High Performance Processing Systems Enabled by 3D Integration Bob Conn May 5, 2011 1 Bob Conn, RTI International, rconn@rti.org, bobconn@ieee.org RTI ...
URL: https://www.src.org/calendar/e004357/03-conn.pdf
Modified: 2011-05-04 - 1.1MB
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- 20:
TECHCON 2013 (Event E004683) - SRC
- TECHCON 2013 Date: Monday, Sept. 9, 2013, 8 a.m. - Tuesday, Sept. 10, 2013, 10 p.m. CT Location: Renaissance Austin Hotel, Austin, TX, United States Event ID: E004683 E004683 image ...
URL: https://www.src.org/calendar/e004683/
Modified: 2014-03-10 - 136KB
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- 21:
SRC/NSF Design Forum - Position Statement
- A Position Statement in the Forum on Future Directions for Design Automation Research Jason Cong UCLA Computer Science Department http://cadlab.cs.ucla.edu/~cong There are many ...
URL: https://www.src.org/...764/jason-cong-position-statement.pdf
Modified: 2011-08-02 - 35KB
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- 22:
E003932 - Variability Forum - Cao
- Predictive Variability Predictive Variability Modeling Modeling Predictive Variability Predictive Variability Modeling Modeling d D i I li ti d D i I li ti and Design Implications ...
URL: https://www.src.org/calendar/e003932/e003932_s2_3_cao.pdf
Modified: 2010-06-29 - 2.6MB
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- 23:
3D IC University Research e-Workshop (Event E004357) - SRC
- 3D IC University Research e-Workshop Date: Thursday, May 5, 2011, noon-4:30 p.m. ET Location: SRC Conference Room D; via web conference, Research Triangle Park, NC, United States ...
URL: https://www.src.org/calendar/e004357/
Modified: 2011-11-05 - 43KB
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- 24:
Non-Invasive Pre-Bond TSV Test using Ring Oscillators and Multiple...
- Non-Invasive Pre-Bond TSV Test using Ring Oscillators and Multiple Voltage Levels Application Type: Continuation Patent Number: 10444279 Country: United States Status: Filed on ...
URL: https://www.src.org/library/patent/p1635/
Modified: 2019-10-15 - 23KB
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- 25:
Methods for Characterizing, Generating Test Sequences for, and...
- Methods for Characterizing, Generating Test Sequences for, and Simulating Integrated Circuit Faults Using Fault Tuples and Related Systems and Computer Program Products Application ...
URL: https://www.src.org/library/patent/p0228/
Modified: 2004-12-28 - 22KB
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- 26:
Signal Generator with Self-Calibration (Patent P1736) - SRC
- Signal Generator with Self-Calibration Application Type: Utility Patent Number: 10116317 Country: United States Status: Filed on 15-Nov-2017, Issued on 30-Oct-2018 Organization: ...
URL: https://www.src.org/library/patent/p1736/
Modified: 2018-10-30 - 24KB
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- 27:
Multi-Layer Integrated Circuits Having Isolation Cells for Layer...
- Multi-Layer Integrated Circuits Having Isolation Cells for Layer Testing and Related Methods Application Type: Utility Patent Number: 10338133 Country: United States Status: Filed ...
URL: https://www.src.org/library/patent/p1639/
Modified: 2019-07-02 - 25KB
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- 28:
Method and Apparatus For Rapidly Modeling and Simulating Intra...
- Method and Apparatus For Rapidly Modeling and Simulating Intra-Die Statistical Variations in Integrated Circuits using Compressed Parameter Models Application Type: Utility Patent ...
URL: https://www.src.org/library/patent/p1160/
Modified: 2012-10-16 - 24KB
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- 29:
Multi-Layer Integrated Circuits Having Isolation Cells for Layer...
- Multi-Layer Integrated Circuits Having Isolation Cells for Layer Testing and Related Methods Application Type: Continuation (in part) Patent Number: 10838003 Country: United States ...
URL: https://www.src.org/library/patent/p1826/
Modified: 2020-11-17 - 25KB
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- 30:
India Design Review (Event E005563) - SRC
- India Design Review Date: Wednesday, Jan. 7, 2015, 6 p.m. - Thursday, Jan. 8, 2015, 5 p.m. Local Location: Hyatt Bangalore, 1/1, Swami Vivekananda Road, Off M.G. Road, Ulsoor, ...
URL: https://www.src.org/calendar/e005563/
Modified: 2015-02-04 - 82KB
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