CAPSL-T2
P-transistors for PSL Implementation

Zhihong Chen (Purdue University), Theme Leader

At the heart of the proposed hardware are two units – a write-unit and a read-unit. In this theme, we will focus on the development of a read-unit that can be connected to the write-unit. The focus of this theme is to work closely together with the members of the Materials Development for Probabilistic Spin Logic Devices theme to provide feedback for the materials effort and to demonstrate experimentally the implementation of a p-bit.

CAPSL-T2 Metrics

  1. Current

    2 Research Tasks
    1 Universities
    6 Students
    2 Faculty Researchers
    5 Liaison Personnel
  2. This Year

    2 Task Starts
    3 Research Publications
Updated: 26-Apr-2018, 12:05 a.m. ET

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