Questions?
[x] GRC Science Area
ICSS – Integrated Circuit & Systems Sciences

Content Type
Patent Filings 34
Events 31
Other 1

SRC Program
GRC 59
FCRP 7
SRC 7
3D EC 6

Year
2015 3
2012 1
2011 26
2010 1

Center
GSRC 8
C2S2 7
FENA 7
IFC 7
MSD 7
MuSyC 7
TxACE 7
ACE4S 6
EBSM 2
CAIST 1
CDADIC 1
CEMPI 1
CHIRP 1
IPC 1
NCRC 1
NPT 1

Thrust/Theme
CD – Circuit Design 28
ISD – Integrated System Design 10
SLD – System Level Design 10
I3T – Innovative and Intelligent... 6
TT – Test & Testability 6
AMS-CSD – Analog/Mixed-Signal Ci... 4
CADT – Computer-Aided Design and... 4
HWS – Hardware Security 4
LPD – Logic & Physical Design 4
VER – Verification 4
Physical Design 2
ADS – Alternative Device Structu... 1
AIHW – Artificial Intelligence H... 1
AMS – Analog and Mixed-Signal De... 1
AdvTech – Advanced Technology 1
Advanced Bipolar SOI-MOS Transis... 1
Advanced Devices 1
Advanced Devices & Technologies 1
Advanced Technology Option 1
Analysis Design & Simulation 1
BEP – Back End Processes 1
Back End Processes 1
C&S – Controls and Sensing 1
CFM&TCM – CFM & Total Chemical M... 1
CM – Compact Modeling 1
CSR – Cross-Disciplinary Semicon... 1
Contamination Control 1
Cost Reduction 1
DCMOS – Digital CMOS Technologie... 1
DE – Design Environment 1
DSMS – Device Sciences Modeling ... 1
DV – Design Verification 1
Defect Reduction 1
Deposition 1
DesSyn – Design Synthesis 1
DesTech – Design Techniques 1
Doping Technologies 1
EP3C – Efficiency and Performanc... 1
ESH – Environment Safety and Hea... 1
Equip Automation & Process Contr... 1
Equip – Equipment 1
Equip. Auto. and Process Control 1
FACSYS – Factory Systems 1
FAM – Factory Automation & Manag... 1
FEOL – FEOL Processes 1
FacOps – Factory Operations 1
Factory Systems 1
Front End Processes 1
Heat Signal & Power Distribution 1
Heat Signal Power 1
Interconnect Architecture 1
LMD – Logic and Memory Devices 1
Lithography 1
Logic Design 1
Logistics & Modeling/Simulation 1
MT – Memory Technologies 1
MTMP – Metrology Tools Matls & P... 1
Masks 1
Materials 1
Materials & Measurements 1
Metrology 1
Modeling & Simulation 1
Modeling & TCAD 1
Multi-level Interconnect 1
NCR – Non-Classical CMOS Researc... 1
NEM – Nanoengineered Materials 1
NMP – Nanomanufacturing Material... 1
PAT – Patterning 1
PKG – Packaging 1
PMM – Packaging Materials and Me... 1
PMS – Packaging Modeling and Sim... 1
PS/E – Process Simplification/En... 1
Package & Electrical Design 1
Package Reliability 1
Packaging & Interconnect Systems 1
Packaging Materials Interfaces 1
Pat(MPS) – Patterning 1
PatMat – Patterning Materials 1
PatSys – Patterning Systems 1
PhyDes – Physical Design 1
Plasma Etch 1
Process Architecture 1
Processes – Processes 1
Quality & Reliability 1
Rapid Yield Learning 1
Reliability 1
Resist 1
SemiSynBio – Semiconductor Synth... 1
Semiconductor Modeling & Simulat... 1
Signal/Power Management 1
Substrates 1
Synthesis & Verification 1
TCAD-MBPS 1
TM – Thermal Management 1
TechCAD – Technology CAD 1

1 through 30 of 66 similar documents, best matches first.   
Results by:Thunderstone Page: 1 2 3 next >>
1: pdfFinal Report - Workshop on Failure and Uncertainty in Mixed-Signal...
National Science Foundation Workshop on Failure and Uncertainty in Mixed-Signal Circuits and Systems Arlington, Virginia July 8-9, 2010 Principal Investigators: Ralph Cavin, ...
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Modified: 2011-06-01 - 914KB
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2: TECHCON 2011 (Event E004113) - SRC
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URL: https://www.src.org/calendar/e004113/
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3: TECHCON 2012 (Event E004114) - SRC
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4: 3D IC University Research e-Workshop (Event E004357) - SRC
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5: Semiconductor Research Corporation - SRC
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6: pdfSlide 1
Third Annual India Design Review January 7-8, 2015 William H. Joyner, Jr. CADTS William.Joyner@src.org David C. Yeh ICSS David.Yeh@src.org Restricted Distribution: Contains SRC ...
URL: https://www.src.org/...r/e005563/2015_indiawelcome_final.pdf
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7: India Design Review (Event E005563) - SRC
India Design Review Date: Wednesday, Jan. 7, 2015, 6 p.m. - Thursday, Jan. 8, 2015, 5 p.m. Local Location: Hyatt Bangalore, 1/1, Swami Vivekananda Road, Off M.G. Road, Ulsoor, ...
URL: https://www.src.org/calendar/e005563/
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8: pdfDesign Forum: John Hayes Position Statement
Future Directions for Design Automation: Three Challenges John P. Hayes October 1, 2006 1. Complexity and Change With CMOS transistor size approaching the nanometer range, two ...
URL: https://www.src.org/...764/john-hayes-position-statement.pdf
Modified: 2011-08-02 - 26KB
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9: pdfVertically Integrated Test/Calibration and Reliability Enhancement...
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Modified: 2010-07-19 - 54KB
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10: pdfDesign Forum: Hugo De Man Position Statement
Some (possibly controversial) thoughts H. De Man, Em. Prof. K.U.Leuven, Senior Fellow IMEC, deman@imec.be The right questions are formulated. One could start suggestions for ...
URL: https://www.src.org/...764/hugo-deman-position-statement.pdf
Modified: 2011-08-02 - 36KB
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11: pdfPresentation Title
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URL: https://www.src.org/calendar/e004357/02-radojcic.pdf
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12: Method for Testing Analog and Mixed-Signal Circuits Using Functionally...
Method for Testing Analog and Mixed-Signal Circuits Using Functionally Related Excitations and Functionally Related Measurements Application Type: Utility Patent Number: 7129734 ...
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Self Bias and Digitally Tunable Conduction Angle Circuits for a differential RF Non-linear Power Amplifier Employing Low-Voltage Transistors Application Type: Utility Patent ...
URL: https://www.src.org/library/patent/p0300/
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URL: https://www.src.org/library/patent/p0407/
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URL: https://www.src.org/library/patent/p0477/
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17: pdfSRC/NSF Design Forum - Position Statement
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URL: https://www.src.org/...02764/juan-rey-position-statement.pdf
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18: pdfSRC/NSF Design Forum - Position Statement
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21: pdfTECHCON 2011 Judges and Chairs
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1 through 30 of 66 similar documents, best matches first.   
Results by:Thunderstone Page: 1 2 3 next >>