Questions?
[x] GRC Science Area
CADTS – Computer Aided Design & Test Sciences

Content Type
Events 37
Patent Filings 26
Other 1

SRC Program
GRC 48
SRC 16
FCRP 6
3D EC 4

Year
2015 3
2013 2
2012 1
2011 20
2010 11

Center
C2S2 8
FENA 6
GSRC 6
IFC 6
MSD 6
TxACE 6
C-FAR 3
CNFD 3
FAME 3
INDEX 3
LEAST 3
MuSyC 3
SONIC 3
SWAN 3
TerraSwarm 3
EBSM 2
ACE4S 1
CAIST 1
CDADIC 1
CEMPI 1
CHIRP 1
IPC 1
NCRC 1
NPT 1

Thrust/Theme
TT – Test & Testability 14
LPD – Logic & Physical Design 13
CADT – Computer-Aided Design and... 10
VER – Verification 7
AMS-CSD – Analog/Mixed-Signal Ci... 4
CD – Circuit Design 4
HWS – Hardware Security 4
ISD – Integrated System Design 4
SLD – System Level Design 4
Physical Design 3
DesTech – Design Techniques 2
Synthesis & Verification 2
ADS – Alternative Device Structu... 1
AIHW – Artificial Intelligence H... 1
AMS – Analog and Mixed-Signal De... 1
AdvTech – Advanced Technology 1
Advanced Bipolar SOI-MOS Transis... 1
Advanced Devices 1
Advanced Devices & Technologies 1
Advanced Technology Option 1
Analysis Design & Simulation 1
BEP – Back End Processes 1
Back End Processes 1
C&S – Controls and Sensing 1
CFM&TCM – CFM & Total Chemical M... 1
CM – Compact Modeling 1
CSR – Cross-Disciplinary Semicon... 1
Contamination Control 1
Cost Reduction 1
DCMOS – Digital CMOS Technologie... 1
DE – Design Environment 1
DSMS – Device Sciences Modeling ... 1
DV – Design Verification 1
Defect Reduction 1
Deposition 1
DesSyn – Design Synthesis 1
Doping Technologies 1
EP3C – Efficiency and Performanc... 1
ESH – Environment Safety and Hea... 1
Equip Automation & Process Contr... 1
Equip – Equipment 1
Equip. Auto. and Process Control 1
FACSYS – Factory Systems 1
FAM – Factory Automation & Manag... 1
FEOL – FEOL Processes 1
FacOps – Factory Operations 1
Factory Systems 1
Front End Processes 1
Heat Signal & Power Distribution 1
Heat Signal Power 1
I3T – Innovative and Intelligent... 1
Interconnect Architecture 1
LMD – Logic and Memory Devices 1
Lithography 1
Logic Design 1
Logistics & Modeling/Simulation 1
MT – Memory Technologies 1
MTMP – Metrology Tools Matls & P... 1
Masks 1
Materials 1
Materials & Measurements 1
Metrology 1
Modeling & Simulation 1
Modeling & TCAD 1
Multi-level Interconnect 1
NCR – Non-Classical CMOS Researc... 1
NEM – Nanoengineered Materials 1
NMP – Nanomanufacturing Material... 1
PAT – Patterning 1
PKG – Packaging 1
PMM – Packaging Materials and Me... 1
PMS – Packaging Modeling and Sim... 1
PS/E – Process Simplification/En... 1
Package & Electrical Design 1
Package Reliability 1
Packaging & Interconnect Systems 1
Packaging Materials Interfaces 1
Pat(MPS) – Patterning 1
PatMat – Patterning Materials 1
PatSys – Patterning Systems 1
PhyDes – Physical Design 1
Plasma Etch 1
Process Architecture 1
Processes – Processes 1
Quality & Reliability 1
Rapid Yield Learning 1
Reliability 1
Resist 1
SemiSynBio – Semiconductor Synth... 1
Semiconductor Modeling & Simulat... 1
Signal/Power Management 1
Substrates 1
TCAD-MBPS 1
TM – Thermal Management 1
TechCAD – Technology CAD 1

1 through 30 of 64 similar documents, best matches first.   
Results by:Thunderstone Page: 1 2 3 next >>
1: pdfFinal Report - Workshop on Failure and Uncertainty in Mixed-Signal...
National Science Foundation Workshop on Failure and Uncertainty in Mixed-Signal Circuits and Systems Arlington, Virginia July 8-9, 2010 Principal Investigators: Ralph Cavin, ...
URL: https://www.src.org/calendar/e004025/final-report.pdf
Modified: 2011-06-01 - 914KB
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2: pdfSRC/NSF Design Forum - Position Statement
A Position Statement in the Forum on Future Directions for Design Automation Research Jason Cong UCLA Computer Science Department http://cadlab.cs.ucla.edu/~cong There are many ...
URL: https://www.src.org/...764/jason-cong-position-statement.pdf
Modified: 2011-08-02 - 35KB
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3: India Design Review (Event E005563) - SRC
India Design Review Date: Wednesday, Jan. 7, 2015, 6 p.m. - Thursday, Jan. 8, 2015, 5 p.m. Local Location: Hyatt Bangalore, 1/1, Swami Vivekananda Road, Off M.G. Road, Ulsoor, ...
URL: https://www.src.org/calendar/e005563/
Modified: 2015-02-04 - 82KB
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4: TECHCON 2012 (Event E004114) - SRC
TECHCON 2012 Date: Monday, Sept. 10, 2012, 8 a.m. - Tuesday, Sept. 11, 2012, 10 p.m. CT Location: Renaissance Austin Hotel, Austin, TX, United States Event ID: E004114 E004114 ...
URL: https://www.src.org/calendar/e004114/
Modified: 2013-03-11 - 98KB
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5: TECHCON 2013 (Event E004683) - SRC
TECHCON 2013 Date: Monday, Sept. 9, 2013, 8 a.m. - Tuesday, Sept. 10, 2013, 10 p.m. CT Location: Renaissance Austin Hotel, Austin, TX, United States Event ID: E004683 E004683 image ...
URL: https://www.src.org/calendar/e004683/
Modified: 2014-03-10 - 136KB
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6: pdfSRC/NSF Design Forum - Position Statement
© R.A. Rutenbar 2006 NSF Forum on Future Directions for Design Automation Research Increased Diversity: Position Statement NSF Forum on Future Directions for Design Automation ...
URL: https://www.src.org/...4/rob-rutenbar-position-statement.pdf
Modified: 2011-08-02 - 99KB
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7: TECHCON 2011 (Event E004113) - SRC
TECHCON 2011 Date: Monday, Sept. 12, 2011, 8 a.m. - Tuesday, Sept. 13, 2011, 10 p.m. CT Location: Renaissance Austin Hotel, Austin, TX, United States Event ID: E004113 E004113 ...
URL: https://www.src.org/calendar/e004113/
Modified: 2012-03-13 - 97KB
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8: pdfMicrosoft PowerPoint - Watson SRC TECHCON 090913 FINAL PUBLISH...
© 2013 International Business Machines Corporation SRC TECHCON 2013 Putting Watson to Work September 9, 2013 Richard Talbot Director, PLM IBM Power Systems - Austin, Texas ...
URL: https://www.src.org/...004683/watson/talbot-techcon-2013.pdf
Modified: 2013-09-19 - 3.0MB
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9: pdfE003932 - Variability Forum - Gupta
NanoCAD Lab Modeling Performance Impact of Variability Puneet Gupta Dept. of EE, University of California Los Angeles (puneet@ee.ucla.edu) Work partly supported by NSF, UC ...
URL: https://www.src.org/calendar/e003932/e003932_s2_2_gupta.pdf
Modified: 2010-06-29 - 1.4MB
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10: pdfDesign Forum: Hugo De Man Position Statement
Some (possibly controversial) thoughts H. De Man, Em. Prof. K.U.Leuven, Senior Fellow IMEC, deman@imec.be The right questions are formulated. One could start suggestions for ...
URL: https://www.src.org/...764/hugo-deman-position-statement.pdf
Modified: 2011-08-02 - 36KB
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11: pdfE003932 - Variability Forum - Torres
Variability, Friend or Foe?: An EDA Foe?: An EDA perspective J. Andres Torres LFD Product Lead Engineer Calibre Design to Silicon Division Calibre Design to Silicon Division April ...
URL: https://www.src.org/calendar/e003932/e003932_s3_2_torres.pdf
Modified: 2010-06-29 - 387KB
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12: pdfSRC/NSF Design Forum - Position Statement
A Forum on Future Directions for Design Automation Research Juan C. Rey Senior Director Of Engineering Design to Silicon Division Mentor Graphics Corporation October, 2006 10:30 ...
URL: https://www.src.org/...02764/juan-rey-position-statement.pdf
Modified: 2011-08-02 - 13KB
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13: pdfSRC/NSF Design Forum - Posiltion Statement
Future Directions for Design Automation Research Tim Cheng, UCSB In my opinion, the following are three key challenges for future design automation research. Silicon Debugging: The ...
URL: https://www.src.org/...2764/tim-cheng-position-statement.pdf
Modified: 2011-08-02 - 14KB
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14: System and Method to Test Integrated Circuits on a Wafer (Patent...
System and Method to Test Integrated Circuits on a Wafer Application Type: Utility Patent Number: 7325180 Country: United States Status: Filed on 26-Nov-2003, Issued on ...
URL: https://www.src.org/library/patent/p0413/
Modified: 2008-01-29 - 22KB
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15: pdfSRC/NSF Design Forum - Position Statement
Thoughts on the "Future Directions of Design Automation Research" Andreas Kuehlmann, Cadence Berkeley Labs October 24, 2006 Some of the main challenges we will face in the next ...
URL: https://www.src.org/...reas-kuehlmann-position-statement.pdf
Modified: 2011-08-02 - 69KB
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16: Method and System for Synthesizing Relative Timing Constraints...
Method and System for Synthesizing Relative Timing Constraints on an Integrated Circuit Design to Facilitate Timing Verification Application Type: Continuation Patent Number: ...
URL: https://www.src.org/library/patent/p1354/
Modified: 2012-11-27 - 24KB
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17: Method and System for Synthesizing Relative Timing Constraints...
Method and System for Synthesizing Relative Timing Constraints on an Integrated Circuit Design to Facilitate Timing Verification Application Type: Utility Patent Number: 8239796 ...
URL: https://www.src.org/library/patent/p1202/
Modified: 2012-08-07 - 24KB
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18: Clock Gating with an Asynchronous Wrapper Cell (Patent P1440...
Clock Gating with an Asynchronous Wrapper Cell Application Type: Utility Patent Number: 9753486 Country: United States Status: Filed on 15-Jun-2015, Issued on 5-Sep-2017 ...
URL: https://www.src.org/library/patent/p1440/
Modified: 2017-09-05 - 22KB
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19: Methods for Characterizing, Generating Test Sequences for, and...
Methods for Characterizing, Generating Test Sequences for, and Simulating Integrated Circuit Faults Using Fault Tuples and Related Systems and Computer Program Products Application ...
URL: https://www.src.org/library/patent/p0228/
Modified: 2004-12-28 - 22KB
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20: Semiconductor Research Corporation - SRC
GRC GRC Global Research Collaboration Our motivation is to fund the most relevant and critical research for international companies, so we go where the best university talent ...
URL: https://www.src.org/program/grc/
Modified: 2023-10-10 - 33KB
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21: Method and Apparatus For Rapidly Modeling and Simulating Intra...
Method and Apparatus For Rapidly Modeling and Simulating Intra-Die Statistical Variations in Integrated Circuits using Compressed Parameter Models Application Type: Utility Patent ...
URL: https://www.src.org/library/patent/p1160/
Modified: 2012-10-16 - 24KB
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22: 3D IC University Research e-Workshop (Event E004357) - SRC
3D IC University Research e-Workshop Date: Thursday, May 5, 2011, noon-4:30 p.m. ET Location: SRC Conference Room D; via web conference, Research Triangle Park, NC, United States ...
URL: https://www.src.org/calendar/e004357/
Modified: 2011-11-05 - 43KB
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23: pdfPresentation Title
PAGE 1 QUALCOMM CONFIDENTIAL AND PROPRIETARY QUALCOMM CONFIDENTIAL AND PROPRIETARY qctconnect.com 3D Through Si Stacking Technology - an IFM Perspective - RikoR May 11 PAGE 2 ...
URL: https://www.src.org/calendar/e004357/02-radojcic.pdf
Modified: 2011-05-04 - 2.4MB
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24: pdfE003932 - Variability Forum - Spanos
1 University of California . Berkeley . EECS . C. J. Spanos . 4/30/2010 Statistical Description of Process Variability First International Variability Characterization Workshop ...
URL: https://www.src.org/calendar/e003932/e003932_s2_1_spanos.pdf
Modified: 2010-06-29 - 2.8MB
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25: pdf3D IMAPS
Tezzaron Semiconductor 05/05/2011 SRC 3D Summit Bob Patti, CTO rpatti@tezzaron.com 1 Tezzaron Semiconductor 05/05/2011 Why We Scale? 2 >180nm 90nm 65nm 130nm 45nm 28nm 22nm 16nm ...
URL: https://www.src.org/calendar/e004357/04-patti.pdf
Modified: 2011-05-04 - 4.4MB
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26: pdfE003932 - Variability Forum - Nowka
Test Structures for Variability Characterization Kevin Nowka IBM Research - Austin nowka@us.ibm.com IBM Research Worldwide Watson Almaden Zurich Beijing Haifa Austin Tokyo Delhi ...
URL: https://www.src.org/calendar/e003932/e003932_s1_3_nowka.pdf
Modified: 2010-06-29 - 1.4MB
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27: pdfE003932 - Variability Forum - Cao
Predictive Variability Predictive Variability Modeling Modeling Predictive Variability Predictive Variability Modeling Modeling d D i I li ti d D i I li ti and Design Implications ...
URL: https://www.src.org/calendar/e003932/e003932_s2_3_cao.pdf
Modified: 2010-06-29 - 2.6MB
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28: pdfSRC/NSF Design Forum - Position Statement
NSF/SRC Forum on Future Directions for Design Automation Research Top Three Challenges for Electronic Design Automation Sachin Sapatnekar, University of Minnesota As system ...
URL: https://www.src.org/...hin-sapatnekar-position-statement.pdf
Modified: 2011-08-02 - 15KB
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29: Systems and Methods for Testing Integrated Circuits (Patent P0342...
Systems and Methods for Testing Integrated Circuits Application Type: Utility Patent Number: 7032151 Country: United States Status: Filed on 13-Nov-2002, Issued on 18-Apr-2006, ...
URL: https://www.src.org/library/patent/p0342/
Modified: 2006-04-18 - 22KB
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30: Multi-Layer Integrated Circuits Having Isolation Cells for Layer...
Multi-Layer Integrated Circuits Having Isolation Cells for Layer Testing and Related Methods Application Type: Continuation (in part) Patent Number: 10838003 Country: United States ...
URL: https://www.src.org/library/patent/p1826/
Modified: 2020-11-17 - 25KB
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1 through 30 of 64 similar documents, best matches first.   
Results by:Thunderstone Page: 1 2 3 next >>